[PATCH] D35785: [AsmParser][AVX512]Enhance OpMask/Zero/Merge syntax check rubostness

michael zuckerman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 31 12:35:27 PDT 2017


m_zuckerman added inline comments.


================
Comment at: test/MC/X86/avx512-err.s:10
+
+// ERR: Expected an op-mask register at this point
+vfmsub213ps %zmm8, %zmm8, %zmm8 {rn-sae}
----------------
why is this error a true? 
according to the ISA, the instruction can optionally have op mask.  


Repository:
  rL LLVM

https://reviews.llvm.org/D35785





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