[PATCH] D36055: [X86] Disable creating BEXTR from shift and mask operations with BMI. Only do it for TBM.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

In https://reviews.llvm.org/D36055#826154, @craig.topper wrote:

> That's a fair point. Is there a way we can detect that case?


It's tricky - maybe replace X86ISD::BEXTR with a X86ISD::BEXTRI that keeps the constant length/index separate to make it easier to split to SHR+AND in isel - would that help?

TBM usage of BEXTR is curious as well - annoyingly the instruction takes a 32-bit immediate, wasting code size. In some circumstances its better to use the reg form and reuse the value.....

And TBM is also useful to replace AND + low bit mask (index = 0) as it makes folding a load easier and is non-destructive, but if the length % 8 = 0 then its better to fold to movz.


https://reviews.llvm.org/D36055