[PATCH] D36084: [globalisel][tablegen] Support zero-instruction emission.
Daniel Sanders via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 31 06:01:57 PDT 2017
dsanders updated this revision to Diff 108909.
dsanders added a comment.
Herald added a subscriber: javed.absar.
In https://reviews.llvm.org/D36084#825975, @dsanders wrote:
> I had a testcase for this one but it seems to have gone missing. I'll update with one shortly
It looks like it disappeared during a rebase and is already committed. That
being the case, I've just removed the C++ implementation of bitcast and
int_to_ptr that are covered by imported rules.
https://reviews.llvm.org/D36084
Files:
lib/Target/AArch64/AArch64InstructionSelector.cpp
utils/TableGen/GlobalISelEmitter.cpp
Index: utils/TableGen/GlobalISelEmitter.cpp
===================================================================
--- utils/TableGen/GlobalISelEmitter.cpp
+++ utils/TableGen/GlobalISelEmitter.cpp
@@ -2270,6 +2270,7 @@
auto &DstMIBuilder = M.addAction<BuildMIAction>(0, &DstI, InsnMatcher);
DstMIBuilder.addRenderer<CopyRenderer>(0, InsnMatcher, DstIOperand.Name);
DstMIBuilder.addRenderer<CopyRenderer>(0, InsnMatcher, Dst->getName());
+ M.addAction<ConstrainOperandToRegClassAction>(0, 0, RC);
// We're done with this pattern! It's eligible for GISel emission; return
// it.
Index: lib/Target/AArch64/AArch64InstructionSelector.cpp
===================================================================
--- lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -1165,8 +1165,18 @@
case TargetOpcode::G_INTTOPTR:
+ // Imported SelectionDAG rules can handle everything except pointer types
+ // which didn't exist in that instruction selector.
+ if (MRI.getType(I.getOperand(0).getReg()).isPointer() ||
+ MRI.getType(I.getOperand(1).getReg()).isPointer())
+ return selectCopy(I, TII, MRI, TRI, RBI);
case TargetOpcode::G_BITCAST:
- return selectCopy(I, TII, MRI, TRI, RBI);
+ // Imported SelectionDAG rules can handle every bitcast except those that
+ // bitcast from a type to the same type. Ideally, these shouldn't occur
+ // but we might not run an optimizer that deletes them.
+ if (MRI.getType(I.getOperand(0).getReg()) ==
+ MRI.getType(I.getOperand(1).getReg()))
+ return selectCopy(I, TII, MRI, TRI, RBI);
case TargetOpcode::G_FPEXT: {
if (MRI.getType(I.getOperand(0).getReg()) != LLT::scalar(64)) {
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