[llvm] r309422 - Fix conditional tail call branch folding when both edges are the same

Reid Kleckner via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 28 12:48:41 PDT 2017


Author: rnk
Date: Fri Jul 28 12:48:40 2017
New Revision: 309422

URL: http://llvm.org/viewvc/llvm-project?rev=309422&view=rev
Log:
Fix conditional tail call branch folding when both edges are the same

The conditional tail call logic did the wrong thing when both
destinations of a conditional branch were the same:

BB#1: derived from LLVM BB %entry
    Live Ins: %EFLAGS
    Predecessors according to CFG: BB#0
        JE_1 <BB#5>, %EFLAGS<imp-use,kill>
        JMP_1 <BB#5>

BB#5: derived from LLVM BB %sw.epilog
    Predecessors according to CFG: BB#1
        TCRETURNdi64 <ga:@mergeable_conditional_tailcall>, 0, ...

We would fold the JE_1 to a TCRETURNdi64cc, and then remove our BB#5
successor. Then BB#5 would be deleted as it had no predecessors, leaving
a dangling "JMP_1 <BB#5>" reference behind to cause assertions later.

This patch checks that both conditional branch destinations are
different before doing the transform. The standard branch folding logic
is able to remove both the JMP_1 and the JE_1, and for my test case we
end up forming a better conditional tail call later.

Fixes PR33980

Added:
    llvm/trunk/test/CodeGen/X86/conditional-tailcall-samedest.mir
Modified:
    llvm/trunk/lib/CodeGen/BranchFolding.cpp

Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=309422&r1=309421&r2=309422&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original)
+++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Fri Jul 28 12:48:40 2017
@@ -1475,13 +1475,14 @@ ReoptimizeBlock:
       bool PredAnalyzable =
           !TII->analyzeBranch(*Pred, PredTBB, PredFBB, PredCond, true);
 
-      if (PredAnalyzable && !PredCond.empty() && PredTBB == MBB) {
+      if (PredAnalyzable && !PredCond.empty() && PredTBB == MBB &&
+          PredTBB != PredFBB) {
         // The predecessor has a conditional branch to this block which consists
         // of only a tail call. Try to fold the tail call into the conditional
         // branch.
         if (TII->canMakeTailCallConditional(PredCond, TailCall)) {
           // TODO: It would be nice if analyzeBranch() could provide a pointer
-          // to the branch insturction so replaceBranchWithTailCall() doesn't
+          // to the branch instruction so replaceBranchWithTailCall() doesn't
           // have to search for it.
           TII->replaceBranchWithTailCall(*Pred, PredCond, TailCall);
           ++NumTailCalls;

Added: llvm/trunk/test/CodeGen/X86/conditional-tailcall-samedest.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/conditional-tailcall-samedest.mir?rev=309422&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/conditional-tailcall-samedest.mir (added)
+++ llvm/trunk/test/CodeGen/X86/conditional-tailcall-samedest.mir Fri Jul 28 12:48:40 2017
@@ -0,0 +1,139 @@
+# RUN: llc -run-pass=branch-folder %s -o - | FileCheck %s
+
+# PR33980
+
+# Don't form conditional tail calls when the original conditional branch has
+# the same true and false destination. Otherwise, when we remove the tail call
+# successor we will also remove the fallthrough successor from the CFG.
+
+# CHECK: body:             |
+# CHECK:   bb.0.entry:
+# CHECK:     successors: %bb.1.sw.bb(0x40000000)
+# CHECK:     liveins: %edi
+# CHECK:     CMP32ri8 killed %edi, 2, implicit-def %eflags
+# CHECK:     TCRETURNdi64cc @mergeable_conditional_tailcall
+
+# This was the unconditional branch to a dead MBB that we left behind before
+# this bug was fixed.
+# CHECK-NOT: JMP_1 %bb.-1
+
+--- |
+  ; ModuleID = 't.ll'
+  source_filename = "t.ll"
+  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+  target triple = "x86_64--linux"
+  
+  @static_local_guard = external global i64, align 8
+  
+  ; Function Attrs: optsize
+  define void @f(i32 %arg) #0 {
+  entry:
+    switch i32 %arg, label %sw.epilog [
+      i32 0, label %sw.bb
+      i32 1, label %sw.bb
+      i32 2, label %sw.bb2
+    ]
+  
+  sw.bb:                                            ; preds = %entry, %entry
+    %tmp = load atomic i8, i8* bitcast (i64* @static_local_guard to i8*) acquire, align 8
+    %guard.uninitialized.i = icmp eq i8 %tmp, 0
+    br i1 %guard.uninitialized.i, label %init.check.i, label %return, !prof !0
+  
+  init.check.i:                                     ; preds = %sw.bb
+    tail call void @initialize_static_local(i64* nonnull @static_local_guard)
+    ret void
+  
+  sw.bb2:                                           ; preds = %entry
+    tail call void @mergeable_conditional_tailcall()
+    ret void
+  
+  sw.epilog:                                        ; preds = %entry
+    tail call void @mergeable_conditional_tailcall()
+    ret void
+  
+  return:                                           ; preds = %sw.bb
+    ret void
+  }
+  
+  declare void @mergeable_conditional_tailcall()
+  
+  declare void @initialize_static_local(i64*)
+  
+  ; Function Attrs: nounwind
+  declare void @llvm.stackprotector(i8*, i8**) #1
+  
+  attributes #0 = { optsize }
+  attributes #1 = { nounwind }
+  
+  !0 = !{!"branch_weights", i32 1, i32 1048575}
+
+...
+---
+name:            f
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:       
+liveins:         
+  - { reg: '%edi', virtual-reg: '' }
+frameInfo:       
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       0
+  offsetAdjustment: 0
+  maxAlignment:    0
+  adjustsStack:    false
+  hasCalls:        false
+  stackProtector:  ''
+  maxCallFrameSize: 0
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+  savePoint:       ''
+  restorePoint:    ''
+fixedStack:      
+stack:           
+constants:       
+body:             |
+  bb.0.entry:
+    successors: %bb.2.sw.bb(0x40000000), %bb.1.entry(0x40000000)
+    liveins: %edi
+  
+    CMP32ri8 killed %edi, 2, implicit-def %eflags
+    JB_1 %bb.2.sw.bb, implicit %eflags
+    JMP_1 %bb.1.entry
+  
+  bb.1.entry:
+    successors: %bb.4.sw.bb2(0x40000000), %bb.5.sw.epilog(0x40000000)
+    liveins: %eflags
+  
+    JE_1 %bb.4.sw.bb2, implicit killed %eflags
+    JMP_1 %bb.5.sw.epilog
+  
+  bb.2.sw.bb:
+    successors: %bb.3.init.check.i(0x00000800), %bb.6.return(0x7ffff800)
+  
+    %al = ACQUIRE_MOV8rm %rip, 1, _, @static_local_guard, _ :: (volatile load acquire 1 from `i8* bitcast (i64* @static_local_guard to i8*)`, align 8)
+    TEST8rr killed %al, %al, implicit-def %eflags
+    JNE_1 %bb.6.return, implicit killed %eflags
+    JMP_1 %bb.3.init.check.i
+  
+  bb.3.init.check.i:
+    dead %edi = MOV32ri64 @static_local_guard, implicit-def %rdi
+    TCRETURNdi64 @initialize_static_local, 0, csr_64, implicit %rsp, implicit %rdi
+  
+  bb.4.sw.bb2:
+    TCRETURNdi64 @mergeable_conditional_tailcall, 0, csr_64, implicit %rsp
+  
+  bb.5.sw.epilog:
+    TCRETURNdi64 @mergeable_conditional_tailcall, 0, csr_64, implicit %rsp
+  
+  bb.6.return:
+    RET 0
+
+...




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