[PATCH] D34881: [SLP] Allow vectorization of the instruction from the same basic blocks only, NFC.
Alexey Bataev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 28 11:59:19 PDT 2017
ABataev updated this revision to Diff 108690.
ABataev marked an inline comment as done.
ABataev added a comment.
Update after review
https://reviews.llvm.org/D34881
Files:
lib/Transforms/Vectorize/SLPVectorizer.cpp
Index: lib/Transforms/Vectorize/SLPVectorizer.cpp
===================================================================
--- lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -4776,7 +4776,7 @@
if (!Root)
return false;
- if (Root->getParent() != BB)
+ if (Root->getParent() != BB || isa<PHINode>(Root))
return false;
// Start analysis starting from Root instruction. If horizontal reduction is
// found, try to vectorize it. If it is not a horizontal reduction or
@@ -4797,7 +4797,7 @@
if (!V)
continue;
auto *Inst = dyn_cast<Instruction>(V);
- if (!Inst || isa<PHINode>(Inst))
+ if (!Inst)
continue;
if (auto *BI = dyn_cast<BinaryOperator>(Inst)) {
HorizontalReduction HorRdx;
@@ -4831,9 +4831,14 @@
}
// Try to vectorize operands.
+ // Continue analysis for the instruction from the same basic block only to
+ // save compile time.
if (++Level < RecursionMaxDepth)
for (auto *Op : Inst->operand_values())
- Stack.emplace_back(Op, Level);
+ if (VisitedInstrs.insert(Op).second)
+ if (auto *I = dyn_cast<Instruction>(Op))
+ if (!isa<PHINode>(Inst) && I->getParent() == BB)
+ Stack.emplace_back(Op, Level);
}
return Res;
}
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