[llvm] r308813 - RA: Remove another assert on empty intervals
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 21 17:24:01 PDT 2017
Author: arsenm
Date: Fri Jul 21 17:24:01 2017
New Revision: 308813
URL: http://llvm.org/viewvc/llvm-project?rev=308813&view=rev
Log:
RA: Remove another assert on empty intervals
This case is similar to the one fixed in r308808,
except when rematerializing.
Fixes bug 33884.
Modified:
llvm/trunk/lib/CodeGen/InlineSpiller.cpp
llvm/trunk/test/CodeGen/AMDGPU/spill-empty-live-interval.mir
Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=308813&r1=308812&r2=308813&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original)
+++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Fri Jul 21 17:24:01 2017
@@ -643,8 +643,8 @@ void InlineSpiller::reMaterializeAll() {
Edit->eraseVirtReg(Reg);
continue;
}
- assert((LIS.hasInterval(Reg) && !LIS.getInterval(Reg).empty()) &&
- "Reg with empty interval has reference");
+
+ assert(LIS.hasInterval(Reg) && "Reg with no interval");
RegsToSpill[ResultPos++] = Reg;
}
RegsToSpill.erase(RegsToSpill.begin() + ResultPos, RegsToSpill.end());
Modified: llvm/trunk/test/CodeGen/AMDGPU/spill-empty-live-interval.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/spill-empty-live-interval.mir?rev=308813&r1=308812&r2=308813&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/spill-empty-live-interval.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/spill-empty-live-interval.mir Fri Jul 21 17:24:01 2017
@@ -38,3 +38,37 @@ body: |
S_ENDPGM
...
+
+# Similar assert which happens when trying to rematerialize.
+# https://bugs.llvm.org/show_bug.cgi?id=33884
+---
+# CHECK-LABEL: name: rematerialize_empty_interval_has_reference
+
+# CHECK-NOT: MOV
+# CHECK: undef %3.sub2 = V_MOV_B32_e32 1786773504, implicit %exec
+
+# CHECK: bb.1:
+# CHECK-NEXT: S_NOP 0, implicit %3.sub2
+# CHECK-NEXT: S_NOP 0, implicit undef %6.sub0
+# CHECK-NEXT: undef %4.sub2 = V_MOV_B32_e32 0, implicit %exec
+# CHECK-NEXT: S_NOP 0, implicit %4.sub2
+name: rematerialize_empty_interval_has_reference
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vreg_128, preferred-register: '' }
+ - { id: 1, class: vgpr_32, preferred-register: '' }
+ - { id: 2, class: vgpr_32, preferred-register: '' }
+ - { id: 3, class: vreg_128, preferred-register: '' }
+body: |
+ bb.0:
+ successors: %bb.1
+
+ undef %0.sub2 = V_MOV_B32_e32 0, implicit %exec
+ undef %3.sub2 = V_MOV_B32_e32 1786773504, implicit %exec
+
+ bb.1:
+ S_NOP 0, implicit %3.sub2
+ S_NOP 0, implicit undef %0.sub0
+ S_NOP 0, implicit %0.sub2
+
+...
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