[PATCH] D35700: DAGCombiner: Extend reduceBuildVecToTrunc to handle non-zero offset
Zvi Rackover via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 20 14:10:08 PDT 2017
zvi created this revision.
Adding support for combining power2-strided build_vector's where the
first build_vectori's operand is extracted from a non-zero index.
Example:
v4i32 build_vector((extract_elt V, 1),
(extract_elt V, 3),
(extract_elt V, 5),
(extract_elt V, 7))
-->
v4i32 truncate (bitcast (shuffle<1,u,3,u,4,u,5,u,6,u,7,u> V, u) to v4i64)
https://reviews.llvm.org/D35700
Files:
include/llvm/Target/TargetLowering.h
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86ISelLowering.h
test/CodeGen/X86/shuffle-strided-with-offset-256.ll
test/CodeGen/X86/shuffle-strided-with-offset-512.ll
test/CodeGen/X86/vector-shuffle-512-v32.ll
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