[PATCH] D35695: [PowerPC] Mark P9 scheduling model complete

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai created this revision.

This patch just adds the missing information to the https://reviews.llvm.org/P9 scheduling model to allow the model to be marked as complete.
By default, pseudo-instructions are marked as not having scheduling information. This should be OK since the instructions are fully covered, so the pseudo's will expand to instructions that have scheduling info.

The model may not be exactly correct for every instruction - that will be improved over a series of patches to come.

The idea is to keep the scheduling model complete so all instructions are scheduled in the machine scheduler. The subsequent steps will be:

- Verification of the correctness of the model using `utils/schedcover.py` and processor documentation
- Tuning of the scheduler model, heuristics, mutations, etc. based on feedback from performance tracing tools
- Addition of currently un-modeled aspects of the processor as needed (write-back, forwarding, load/store address mapping on the CPU, etc.)
- Addition of any currently un-modeled hazards


Repository:
  rL LLVM

https://reviews.llvm.org/D35695

Files:
  lib/Target/PowerPC/P9InstrResources.td
  lib/Target/PowerPC/PPCInstrFormats.td
  lib/Target/PowerPC/PPCInstrInfo.td
  lib/Target/PowerPC/PPCScheduleP9.td

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D35695.107568.patch
Type: text/x-patch
Size: 9549 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170720/34f829fd/attachment.bin>