[PATCH] D35638: A fix for bug33826
David Kreitzer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 20 07:57:44 PDT 2017
DavidKreitzer added inline comments.
================
Comment at: lib/Target/X86/X86InterleavedAccess.cpp:106
+ if (isa<LoadInst>(Inst)) {
+ if (DL.getTypeSizeInBits(ShuffleVecTy) != 256)
+ return false;
----------------
Farhana wrote:
> Farhana wrote:
> > DavidKreitzer wrote:
> > > You could make the ShuffleVecTy check more generic by testing this, which is similar to what you had before adding interleaved store support:
> > >
> > > ```
> > > if (WideInstSize != DL.getTypeSizeInBits(ShuffleVecType) * Factor)
> > > return false;
> > > ```
> > >
> > > I get your point about the profitability. I think your comment in the test adequately captures that.
> > I cannot write the way you suggested, it would be incorrect. We are checking the ShuffleVecType, so it can't be multiplied with Factor.
> >
> > For store, it will check against 1024 * 4.
> >
> >
> But we can make it semi generic by hardcoding the number of elements.
>
>
> I cannot write the way you suggested, it would be incorrect. We are checking the ShuffleVecType, so it can't be multiplied with Factor. For store, it will check against 1024 * 4.
But the code in question is guarded by isa<LoadInst>(Inst). At any rate, what you have is fine if you change 256 to ShuffleElemSize * SupportedNumElem.
https://reviews.llvm.org/D35638
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