[PATCH] D35568: [AArch64] Use 16 bytes as preferred function alignment on Cortex-A53.

[Davide Italiano via Phabricator via llvm-commits]

davide added inline comments.


================
Comment at: lib/Target/AArch64/AArch64Subtarget.cpp:133-135
+  case CortexA53:
+    PrefFunctionAlignment = 4;
+    break;
----------------
I assume you're talking about the llvm test-suite benchmarks. 
If not, you may want to add a link to your benchmarks :)

That said, the size increase seems non negligible. Have you considered disabling this when optimizing for size?


https://reviews.llvm.org/D35568