[PATCH] D34276: [mips] Alter register classes for MSA pseudo f16 instructions

[Stefan Maksimovic via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL308301: [mips] Alter register classes for MSA pseudo f16 instructions (authored by smaksimovic).

Changed prior to commit:
  https://reviews.llvm.org/D34276?vs=105048&id=107074#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D34276

Files:
  llvm/trunk/lib/Target/Mips/MipsInstrFPU.td
  llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp
  llvm/trunk/test/CodeGen/Mips/msa/f16-llvm-ir.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D34276.107074.patch
Type: text/x-patch
Size: 6226 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170718/f7bd1fbc/attachment.bin>