[PATCH] D35390: AMDGPU: Pass special input registers to functions
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 14 15:27:07 PDT 2017
rampitec added inline comments.
================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:3600
+
+ return DAG.getLoad(VT, SL, DAG.getEntryNode(), Ptr, SrcPtrInfo, 4,
+ MachineMemOperand::MODereferenceable |
----------------
Do not you need to get alignment from DL and VT?
================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:1070
MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass);
+ assert(Reg == AMDGPU::VGPR0);
+
----------------
This assert and below not needed.
================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:1123
+ if (RegIdx == ArgSGPRs.size())
+ report_fatal_error("ran out of SGPRs for arguments");
+
----------------
Shall we use stack for scalar arguments as well, or shall we try to use VGPR first maybe?
I assume we may have user SGPR arguments as well, not predefined ones only.
https://reviews.llvm.org/D35390
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