[PATCH] D35319: LSE Atomics reorg - Part I

[Tim Northover via Phabricator via llvm-commits]

t.p.northover added inline comments.


================
Comment at: lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp:124
+      CASE_AARCH64_ATOMIC_(CASA):
+      CASE_AARCH64_ATOMIC_(CASAL):
+
----------------
christof wrote:
> I don't think CAS and CASP lose acquire semantics when they target the zero register. Am I wrong?
I think christof is right too. LD* and SWP are the ones affected.


Repository:
  rL LLVM

https://reviews.llvm.org/D35319