[PATCH] D35340: [x86] use more shift or LEA for select-of-constants

Zvi Rackover via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 13 07:45:54 PDT 2017


zvi added inline comments.


================
Comment at: test/CodeGen/X86/memcmp.ll:31
 ; X86-NOSSE-NEXT:  .LBB0_1:
-; X86-NOSSE-NEXT:    movl $1, %eax
-; X86-NOSSE-NEXT:    jne .LBB0_4
-; X86-NOSSE-NEXT:  .LBB0_3:
-; X86-NOSSE-NEXT:    xorl %eax, %eax
+; X86-NOSSE-NEXT:    movb %cl, %al
+; X86-NOSSE-NEXT:    leal -1(%eax,%eax), %eax
----------------
A write to AL followed by a read from EAX may cause a partial register stall or a lesser penalty if the processor supports special 'merge register parts' micro-ops (which is also undesirable) .
This seems to be a recurring pattern as the tests show.


https://reviews.llvm.org/D35340





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