[PATCH] D35248: [ARM] Tidy up and organise better ARM.td. NFC.

[Florian Hahn via Phabricator via llvm-commits]

fhahn accepted this revision.
fhahn added a comment.
This revision is now accepted and ready to land.

I've spotted a few more cases where the indentation looks slightly off.

Besides those nits, LGTM.  Please fix them before committing and hold off committing the change until tomorrow evening, so Renato and Diana have a little bit more time to raise concerns.



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Comment at: lib/Target/ARM/ARM.td:60
+def FeatureFP16           : SubtargetFeature<"fp16", "HasFP16", "true",
+                                        "Enable half-precision floating point">;
+
----------------
Indent off?


================
Comment at: lib/Target/ARM/ARM.td:92
+def FeatureDB             : SubtargetFeature<"db", "HasDataBarrier", "true",
+                                        "Has data barrier (dmb/dsb) instructions">;
+
----------------
Indent off


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Comment at: lib/Target/ARM/ARM.td:180
 def FeatureSlowOddRegister : SubtargetFeature<"slow-odd-reg", "SlowOddRegister",
                      "true", "VLDM/VSTM starting with an odd register is slow">;
 
----------------
indent off?


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Comment at: lib/Target/ARM/ARM.td:236
+                                             "HasVMLxForwarding", "true",
                                        "Has multiplier accumulator forwarding">;
 
----------------
indent off?


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Comment at: lib/Target/ARM/ARM.td:265
 def FeatureHasRetAddrStack : SubtargetFeature<"ret-addr-stack", "HasRetAddrStack", "true",
                                      "Has return address stack">;
 
----------------
indent off?


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Comment at: lib/Target/ARM/ARM.td:276
+def FeatureDSP            : SubtargetFeature<"dsp", "HasDSP", "true",
                               "Supports DSP instructions in ARM and/or Thumb2">;
 
----------------
indent off?


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Comment at: lib/Target/ARM/ARM.td:280
+def FeatureMP             : SubtargetFeature<"mp", "HasMPExtension", "true",
+                                        "Supports Multiprocessing extension">;
 
----------------
Indent off?


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Comment at: lib/Target/ARM/ARM.td:361
 def HasV5TEOps  : SubtargetFeature<"v5te", "HasV5TEOps", "true",
                              "Support ARM v5TE, v5TEj, and v5TExp instructions",
                                    [HasV5TOps]>;
----------------
indent off?


================
Comment at: lib/Target/ARM/ARM.td:387
                                    [HasV6T2Ops, FeaturePerfMon,
                                     FeatureV7Clrex]>;
+
----------------
alignment off by 1 space?


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Comment at: lib/Target/ARM/ARM.td:402
 def HasV8_2aOps   : SubtargetFeature<"v8.2a", "HasV8_2aOps", "true",
                                    "Support ARM v8.2a instructions",
                                    [HasV8_1aOps]>;
----------------
alignment looks off by 2 spaces (same for the line below)


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Comment at: lib/Target/ARM/ARM.td:760
 
-// FIXME: krait has currently the same Schedule model as A9
-// FIXME: krait has currently the same features as A9 plus VFP4 and hardware
-//        division features.
+// FIXME: krait has currently the same features as A9 plus VFP4 and  HWDiv
 def : ProcessorModel<"krait",       CortexA9Model,      [ARMv7a, ProcKrait,
----------------
multiple spaces after `and`


https://reviews.llvm.org/D35248