[PATCH] D35209: [ARM] Unify handling of M-Class system registers

[Oliver Stannard via Phabricator via llvm-commits]

olista01 added a comment.

Another option would be to table-generate this mapping using SearchableTable.td, as is currently done for AArch64 system registers and instructions. This would allow us to have one table in the source, from which both the name->encoding and encoding->name mappings are generated.


https://reviews.llvm.org/D35209