[PATCH] D35192: [ARM] Use ADDCARRY / SUBCARRY

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


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Comment at: lib/Target/ARM/ARMISelLowering.cpp:9976
+      SDLoc DL(N);
+      return LHS->getOperand(2);
+    }
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ARMISD::SUBC return two values.  The flags register will be the same, but the returned value might not.


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Comment at: lib/Target/ARM/ARMISelLowering.cpp:10016
                                       const ARMSubtarget *Subtarget) {
+  // (ADDE 0, 0, (SUBC X, 1)) -> X
+  if (N->getOpcode() == ARMISD::ADDE) {
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What is this combine trying to do?  X is an arbitrary i32; the numeric result of ADDE is either 0 or 1.


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Comment at: lib/Target/ARM/ARMISelLowering.cpp:12823
+    }
     // These nodes' second result is a boolean
     Known.Zero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
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Is this true?


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Comment at: test/CodeGen/ARM/intrinsics-overflow.ll:12
+  ; CHECK: mov r[[R2:[0-9]+]], #0
+  ; CHECK: adc r[[R0]], r[[R2]], #0
 }
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Could you change this test to also show what happens in Thumb1 mode?


https://reviews.llvm.org/D35192