[PATCH] D35218: [AMDGPU] fcanonicalize elimination optimization
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 10 13:32:52 PDT 2017
arsenm added inline comments.
================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:4665-4668
+ // In pre-GFX9 targets V_MIN_F32 and others do not flush denorms.
+ // For such targets need to check their input recursively.
+ case ISD::FMINNUM:
+ case ISD::FMAXNUM:
----------------
rampitec wrote:
> arsenm wrote:
> > rampitec wrote:
> > > arsenm wrote:
> > > > The output is never flushed anywhere?
> > > GFX9 flushes.
> > That is broken. If that is the case we probably shouldn't be using the regular minnum/maxnum intrinsics without denormals, and then it's an optimization to fold canonicalize (min/max) to the weird target behavior.
> The library is common for different targets.
We need to fix that then. If it's not returning exactly one of the inputs it's not implementing the IEEE min/max
================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:4671-4672
+ case ISD::FMAXNAN:
+ if (ST->getGeneration() >= SISubtarget::GFX9)
+ return true;
+
----------------
rampitec wrote:
> arsenm wrote:
> > rampitec wrote:
> > > arsenm wrote:
> > > > I don't think this is true, but should have a named check in the subtarget
> > > I would rather think about denorm support flag in TD for every single instruction wrt subtarget. Why add just a single one?
> > We don't need a full fledged subtarget feature, just put the generation check in a function with name/description rather than adding more random looking generation checks
> I'm not sure I follow. Could you please describe a name of such check?
hasAddr64() or hasMed3_16()
https://reviews.llvm.org/D35218
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