[llvm] r307527 - [GlobalISel][X86] Support G_LOAD/G_STORE i1.
Igor Breger via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 10 02:26:10 PDT 2017
Author: ibreger
Date: Mon Jul 10 02:26:09 2017
New Revision: 307527
URL: http://llvm.org/viewvc/llvm-project?rev=307527&view=rev
Log:
[GlobalISel][X86] Support G_LOAD/G_STORE i1.
Summary: Support G_LOAD/G_STORE i1.
Reviewers: zvi, guyblank
Reviewed By: guyblank
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D35178
Modified:
llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp
llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll
llvm/trunk/test/CodeGen/X86/GlobalISel/memop-scalar.ll
Modified: llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp?rev=307527&r1=307526&r2=307527&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp Mon Jul 10 02:26:09 2017
@@ -69,6 +69,7 @@ void X86LegalizerInfo::setLegalizerInfo3
for (auto Ty : {s8, s16, s32, p0})
setAction({MemOp, Ty}, Legal);
+ setAction({MemOp, s1}, WidenScalar);
// And everything's fine in addrspace 0.
setAction({MemOp, 1, p0}, Legal);
}
@@ -128,6 +129,7 @@ void X86LegalizerInfo::setLegalizerInfo6
for (auto Ty : {s8, s16, s32, s64, p0})
setAction({MemOp, Ty}, Legal);
+ setAction({MemOp, s1}, WidenScalar);
// And everything's fine in addrspace 0.
setAction({MemOp, 1, p0}, Legal);
}
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir?rev=307527&r1=307526&r2=307527&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir Mon Jul 10 02:26:09 2017
@@ -26,11 +26,18 @@ registers:
- { id: 6, class: _, preferred-register: '' }
- { id: 7, class: _, preferred-register: '' }
- { id: 8, class: _, preferred-register: '' }
+ - { id: 9, class: _, preferred-register: '' }
+ - { id: 10, class: _, preferred-register: '' }
# ALL: %0(p0) = IMPLICIT_DEF
+# ALL-NEXT: %11(s8) = G_LOAD %0(p0) :: (load 1)
+# ALL-NEXT: %9(s1) = G_TRUNC %11(s8)
# ALL-NEXT: %1(s8) = G_LOAD %0(p0) :: (load 1)
# ALL-NEXT: %2(s16) = G_LOAD %0(p0) :: (load 2)
# ALL-NEXT: %3(s32) = G_LOAD %0(p0) :: (load 4)
# ALL-NEXT: %4(p0) = G_LOAD %0(p0) :: (load 8)
+# ALL-NEXT: %10(s1) = IMPLICIT_DEF
+# ALL-NEXT: %12(s8) = G_ZEXT %10(s1)
+# ALL-NEXT: G_STORE %12(s8), %0(p0) :: (store 1)
# ALL-NEXT: %5(s8) = IMPLICIT_DEF
# ALL-NEXT: G_STORE %5(s8), %0(p0) :: (store 1)
# ALL-NEXT: %6(s16) = IMPLICIT_DEF
@@ -44,11 +51,14 @@ body: |
liveins: %rdi
%0(p0) = IMPLICIT_DEF
+ %9(s1) = G_LOAD %0(p0) :: (load 1)
%1(s8) = G_LOAD %0(p0) :: (load 1)
%2(s16) = G_LOAD %0(p0) :: (load 2)
%3(s32) = G_LOAD %0(p0) :: (load 4)
%4(p0) = G_LOAD %0(p0) :: (load 8)
+ %10(s1) = IMPLICIT_DEF
+ G_STORE %10, %0 :: (store 1)
%5(s8) = IMPLICIT_DEF
G_STORE %5, %0 :: (store 1)
%6(s16) = IMPLICIT_DEF
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll?rev=307527&r1=307526&r2=307527&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll Mon Jul 10 02:26:09 2017
@@ -4,6 +4,16 @@
;TODO merge with x86-64 tests (many operations not suppored yet)
+define i1 @test_load_i1(i1 * %p1) {
+; ALL-LABEL: test_load_i1:
+; ALL: # BB#0:
+; ALL-NEXT: movl 4(%esp), %eax
+; ALL-NEXT: movb (%eax), %al
+; ALL-NEXT: retl
+ %r = load i1, i1* %p1
+ ret i1 %r
+}
+
define i8 @test_load_i8(i8 * %p1) {
; ALL-LABEL: test_load_i8:
; ALL: # BB#0:
@@ -34,6 +44,18 @@ define i32 @test_load_i32(i32 * %p1) {
ret i32 %r
}
+define i1 * @test_store_i1(i1 %val, i1 * %p1) {
+; ALL-LABEL: test_store_i1:
+; ALL: # BB#0:
+; ALL-NEXT: movb 4(%esp), %cl
+; ALL-NEXT: movl 8(%esp), %eax
+; ALL-NEXT: andb $1, %cl
+; ALL-NEXT: movb %cl, (%eax)
+; ALL-NEXT: retl
+ store i1 %val, i1* %p1
+ ret i1 * %p1;
+}
+
define i8 * @test_store_i8(i8 %val, i8 * %p1) {
; ALL-LABEL: test_store_i8:
; ALL: # BB#0:
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/memop-scalar.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/memop-scalar.ll?rev=307527&r1=307526&r2=307527&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/memop-scalar.ll (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/memop-scalar.ll Mon Jul 10 02:26:09 2017
@@ -2,6 +2,15 @@
; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE_FAST
; RUN: llc -mtriple=x86_64-linux-gnu -regbankselect-greedy -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE_GREEDY
+define i1 @test_load_i1(i1 * %p1) {
+; ALL-LABEL: test_load_i1:
+; ALL: # BB#0:
+; ALL-NEXT: movb (%rdi), %al
+; ALL-NEXT: retq
+ %r = load i1, i1* %p1
+ ret i1 %r
+}
+
define i8 @test_load_i8(i8 * %p1) {
; ALL-LABEL: test_load_i8:
; ALL: # BB#0:
@@ -70,6 +79,17 @@ define double @test_load_double(double *
ret double %r
}
+define i1 * @test_store_i1(i1 %val, i1 * %p1) {
+; ALL-LABEL: test_store_i1:
+; ALL: # BB#0:
+; ALL-NEXT: andb $1, %dil
+; ALL-NEXT: movb %dil, (%rsi)
+; ALL-NEXT: movq %rsi, %rax
+; ALL-NEXT: retq
+ store i1 %val, i1* %p1
+ ret i1 * %p1;
+}
+
define i32 * @test_store_i32(i32 %val, i32 * %p1) {
; ALL-LABEL: test_store_i32:
; ALL: # BB#0:
More information about the llvm-commits
mailing list