[llvm] r307504 - [X86] Allow GHC calling convention to use YMM and ZMM registers

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Sun Jul  9 09:57:10 2017
New Revision: 307504

URL: http://llvm.org/viewvc/llvm-project?rev=307504&view=rev
Log:
[X86] Allow GHC calling convention to use YMM and ZMM registers

GHC 8.4 will know how to use YMM and ZMM registers for calls.

Submitted on behalf of @bgamari (Ben Gamari)

Differential Revision: https://reviews.llvm.org/D34854 

Modified:
    llvm/trunk/lib/Target/X86/X86CallingConv.td

Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CallingConv.td?rev=307504&r1=307503&r2=307504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86CallingConv.td (original)
+++ llvm/trunk/lib/Target/X86/X86CallingConv.td Sun Jul  9 09:57:10 2017
@@ -651,7 +651,15 @@ def CC_X86_64_GHC : CallingConv<[
   // Pass in STG registers: F1, F2, F3, F4, D1, D2
   CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
             CCIfSubtarget<"hasSSE1()",
-            CCAssignToReg<[XMM1, XMM2, XMM3, XMM4, XMM5, XMM6]>>>
+            CCAssignToReg<[XMM1, XMM2, XMM3, XMM4, XMM5, XMM6]>>>,
+  // AVX
+  CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
+            CCIfSubtarget<"hasAVX()",
+            CCAssignToReg<[YMM1, YMM2, YMM3, YMM4, YMM5, YMM6]>>>,
+  // AVX-512
+  CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
+            CCIfSubtarget<"hasAVX512()",
+            CCAssignToReg<[ZMM1, ZMM2, ZMM3, ZMM4, ZMM5, ZMM6]>>>
 ]>;
 
 def CC_X86_64_HiPE : CallingConv<[