[llvm] r307351 - LiveRegUnits: Rename accumulateBackward()->accumulate()
Matthias Braun via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 6 20:02:18 PDT 2017
Author: matze
Date: Thu Jul 6 20:02:17 2017
New Revision: 307351
URL: http://llvm.org/viewvc/llvm-project?rev=307351&view=rev
Log:
LiveRegUnits: Rename accumulateBackward()->accumulate()
Contrary to the stepForward()/stepBackward() method accumulate() doesn't
have a direction as defs, uses and clobbers all have the same effect.
Also improve the documentation comment.
Modified:
llvm/trunk/include/llvm/CodeGen/LiveRegUnits.h
llvm/trunk/lib/CodeGen/LiveRegUnits.cpp
llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
llvm/trunk/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
Modified: llvm/trunk/include/llvm/CodeGen/LiveRegUnits.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveRegUnits.h?rev=307351&r1=307350&r2=307351&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/LiveRegUnits.h (original)
+++ llvm/trunk/include/llvm/CodeGen/LiveRegUnits.h Thu Jul 6 20:02:17 2017
@@ -95,10 +95,10 @@ public:
/// Updates liveness when stepping backwards over the instruction \p MI.
void stepBackward(const MachineInstr &MI);
- /// Mark all register units live during instruction \p MI.
- /// This can be used to accumulate live/unoccupied registers over a range of
- /// instructions.
- void accumulateBackward(const MachineInstr &MI);
+ /// Adds all register units used, defined or clobbered in \p MI.
+ /// This is useful when walking over a range of instruction to find registers
+ /// unused over the whole range.
+ void accumulate(const MachineInstr &MI);
/// Adds registers living out of block \p MBB.
/// Live out registers are the union of the live-in registers of the successor
Modified: llvm/trunk/lib/CodeGen/LiveRegUnits.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveRegUnits.cpp?rev=307351&r1=307350&r2=307351&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveRegUnits.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveRegUnits.cpp Thu Jul 6 20:02:17 2017
@@ -67,7 +67,7 @@ void LiveRegUnits::stepBackward(const Ma
}
}
-void LiveRegUnits::accumulateBackward(const MachineInstr &MI) {
+void LiveRegUnits::accumulate(const MachineInstr &MI) {
// Add defs, uses and regmask clobbers to the set.
for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
if (O->isReg()) {
Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=307351&r1=307350&r2=307351&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Thu Jul 6 20:02:17 2017
@@ -388,7 +388,7 @@ findSurvivorBackwards(const MachineRegis
for (MachineBasicBlock::iterator I = From;; --I) {
const MachineInstr &MI = *I;
- Used.accumulateBackward(MI);
+ Used.accumulate(MI);
if (I == To) {
// See if one of the registers in RC wasn't used so far.
Modified: llvm/trunk/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp?rev=307351&r1=307350&r2=307351&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp Thu Jul 6 20:02:17 2017
@@ -509,7 +509,7 @@ int AArch64A57FPLoadBalancing::scavengeR
assert(ChainBegin != ChainEnd && "Chain should contain instructions");
do {
--I;
- Units.accumulateBackward(*I);
+ Units.accumulate(*I);
} while (I != ChainBegin);
// Make sure we allocate in-order, to get the cheapest registers first.
More information about the llvm-commits
mailing list