[PATCH] D34990: Fix endianness bug in DAGCombiner::visitTRUNCATE

[Francois Pichet via Phabricator via llvm-commits]

fpichet updated this revision to Diff 105367.
fpichet added a comment.

Added test case


https://reviews.llvm.org/D34990

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/Mips/pr33682.ll


Index: test/CodeGen/Mips/pr33682.ll
===================================================================
--- /dev/null
+++ test/CodeGen/Mips/pr33682.ll
@@ -0,0 +1,16 @@
+; RUN: llc -march=mips -mcpu=mips32  < %s | FileCheck %s --check-prefixes=ALL,BE
+; RUN: llc -march=mipsel -mcpu=mips32  < %s | FileCheck %s --check-prefixes=ALL,LE
+
+; Verify visitTRUNCATE respects endianness when transforming truncates to extract vector element.
+
+; ALL-LABEL: a:
+; BE: lw $2, 4($4)
+; LE: lw $2, 0($4)
+
+define i32 @a(<2 x i32> * %a) {
+entry:
+%0 = load <2 x i32>, <2 x i32> * %a
+%1 = bitcast <2 x i32> %0 to i64
+%2 = trunc i64 %1 to i32
+ret i32 %2
+}
Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -8364,7 +8364,7 @@
   // Fold truncate of a bitcast of a vector to an extract of the low vector
   // element.
   //
-  // e.g. trunc (i64 (bitcast v2i32:x)) -> extract_vector_elt v2i32:x, 0
+  // e.g. trunc (i64 (bitcast v2i32:x)) -> extract_vector_elt v2i32:x, idx
   if (N0.getOpcode() == ISD::BITCAST && !VT.isVector()) {
     SDValue VecSrc = N0.getOperand(0);
     EVT SrcVT = VecSrc.getValueType();
@@ -8374,8 +8374,9 @@
       SDLoc SL(N);
 
       EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());
+      unsigned Idx = DAG.getDataLayout().isBigEndian() ? 1 : 0;
       return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, VT,
-                         VecSrc, DAG.getConstant(0, SL, IdxVT));
+                         VecSrc, DAG.getConstant(Idx, SL, IdxVT));
     }
   }
 


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