[PATCH] D34990: Fix endianness bug in DAGCombiner::visitTRUNCATE

[Francois Pichet via Phabricator via llvm-commits]

fpichet created this revision.

Do not assume little endian architecture in DAGCombiner::visitTRUNCATE. PR33682

There is no test case because I don't know how to reproduce this problem for an in tree big-endian target.
I found this bug using an out-of-tree target (only happened in -O0)


https://reviews.llvm.org/D34990

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp


Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -8341,7 +8341,7 @@
   // Fold truncate of a bitcast of a vector to an extract of the low vector
   // element.
   //
-  // e.g. trunc (i64 (bitcast v2i32:x)) -> extract_vector_elt v2i32:x, 0
+  // e.g. trunc (i64 (bitcast v2i32:x)) -> extract_vector_elt v2i32:x, idx
   if (N0.getOpcode() == ISD::BITCAST && !VT.isVector()) {
     SDValue VecSrc = N0.getOperand(0);
     EVT SrcVT = VecSrc.getValueType();
@@ -8351,8 +8351,9 @@
       SDLoc SL(N);
 
       EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());
+      unsigned Idx = DAG.getDataLayout().isBigEndian() ? 1 : 0;
       return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, VT,
-                         VecSrc, DAG.getConstant(0, SL, IdxVT));
+                         VecSrc, DAG.getConstant(Idx, SL, IdxVT));
     }
   }
 


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