[PATCH] D34969: [tablegen] Avoid creating a temporary vector in getInstructionCase
Alexander Shaposhnikov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 3 18:01:13 PDT 2017
alexshap updated this revision to Diff 105129.
alexshap added a comment.
address comments
Repository:
rL LLVM
https://reviews.llvm.org/D34969
Files:
utils/TableGen/CodeEmitterGen.cpp
Index: utils/TableGen/CodeEmitterGen.cpp
===================================================================
--- utils/TableGen/CodeEmitterGen.cpp
+++ utils/TableGen/CodeEmitterGen.cpp
@@ -187,35 +187,33 @@
std::string CodeEmitterGen::getInstructionCase(Record *R,
CodeGenTarget &Target) {
std::string Case;
-
BitsInit *BI = R->getValueAsBitsInit("Inst");
- const std::vector<RecordVal> &Vals = R->getValues();
unsigned NumberedOp = 0;
-
std::set<unsigned> NamedOpIndices;
+
// Collect the set of operand indices that might correspond to named
// operand, and skip these when assigning operands based on position.
if (Target.getInstructionSet()->
getValueAsBit("noNamedPositionallyEncodedOperands")) {
CodeGenInstruction &CGI = Target.getInstruction(R);
- for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
+ for (const RecordVal &RV : R->getValues()) {
unsigned OpIdx;
- if (!CGI.Operands.hasOperandNamed(Vals[i].getName(), OpIdx))
+ if (!CGI.Operands.hasOperandNamed(RV.getName(), OpIdx))
continue;
NamedOpIndices.insert(OpIdx);
}
}
// Loop over all of the fields in the instruction, determining which are the
// operands to the instruction.
- for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
+ for (const RecordVal &RV : R->getValues()) {
// Ignore fixed fields in the record, we're looking for values like:
// bits<5> RST = { ?, ?, ?, ?, ? };
- if (Vals[i].getPrefix() || Vals[i].getValue()->isComplete())
+ if (RV.getPrefix() || RV.getValue()->isComplete())
continue;
- AddCodeToMergeInOperand(R, BI, Vals[i].getName(), NumberedOp,
+ AddCodeToMergeInOperand(R, BI, RV.getName(), NumberedOp,
NamedOpIndices, Case, Target);
}
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