[PATCH] D34961: [AArch64] Use 16 bytes as preferred function alignment on Cortex-A72.

[Florian Hahn via Phabricator via llvm-commits]

fhahn created this revision.
Herald added a subscriber: aemerson.

This change gives a 0.34% speed on execution time, a 0.61% improvement
in benchmark scores and a 0.57% increase in binary size on a Cortex-A72.
These numbers are the geomean results on a wide range of benchmarks from
the test-suite, SPEC2000, SPEC2006 and a range of proprietary suites.

The software optimization guide for the Cortex-A72 recommends 16 byte
branch alignment.


https://reviews.llvm.org/D34961

Files:
  lib/Target/AArch64/AArch64Subtarget.cpp
  test/CodeGen/AArch64/preferred-function-alignment.ll


Index: test/CodeGen/AArch64/preferred-function-alignment.ll
===================================================================
--- test/CodeGen/AArch64/preferred-function-alignment.ll
+++ test/CodeGen/AArch64/preferred-function-alignment.ll
@@ -4,6 +4,7 @@
 ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderxt83 < %s | FileCheck --check-prefix=ALIGN3 %s
 ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderxt88 < %s | FileCheck --check-prefix=ALIGN3 %s
 ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=thunderx2t99 < %s | FileCheck --check-prefix=ALIGN3 %s
+; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=cortex-a72 < %s | FileCheck --check-prefix=ALIGN4 %s
 ; RUN: llc -mtriple=aarch64-unknown-linux -mcpu=exynos-m1 < %s | FileCheck --check-prefix=ALIGN4 %s
 
 define void @test() {
Index: lib/Target/AArch64/AArch64Subtarget.cpp
===================================================================
--- lib/Target/AArch64/AArch64Subtarget.cpp
+++ lib/Target/AArch64/AArch64Subtarget.cpp
@@ -130,7 +130,9 @@
     break;
   case CortexA35: break;
   case CortexA53: break;
-  case CortexA72: break;
+  case CortexA72:
+    PrefFunctionAlignment = 4;
+    break;
   case CortexA73: break;
   case Others: break;
   }


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