[llvm] r306981 - [x86] auto-generate complete checks for tests; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 2 07:50:35 PDT 2017
Author: spatel
Date: Sun Jul 2 07:50:35 2017
New Revision: 306981
URL: http://llvm.org/viewvc/llvm-project?rev=306981&view=rev
Log:
[x86] auto-generate complete checks for tests; NFC
These all used 'CHECK-NOT' which isn't necessary if we have complete checks.
Modified:
llvm/trunk/test/CodeGen/X86/vec_unsafe-fp-math.ll
llvm/trunk/test/CodeGen/X86/x32-lea-1.ll
llvm/trunk/test/CodeGen/X86/zext-shl.ll
llvm/trunk/test/CodeGen/X86/zext-trunc.ll
Modified: llvm/trunk/test/CodeGen/X86/vec_unsafe-fp-math.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_unsafe-fp-math.ll?rev=306981&r1=306980&r2=306981&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_unsafe-fp-math.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_unsafe-fp-math.ll Sun Jul 2 07:50:35 2017
@@ -1,13 +1,13 @@
-; RUN: llc < %s -enable-unsafe-fp-math -enable-no-signed-zeros-fp-math -mtriple=x86_64-unknown-unknown -mcpu=corei7 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -enable-unsafe-fp-math -enable-no-signed-zeros-fp-math -mtriple=x86_64-unknown-unknown | FileCheck %s
; Make sure that vectors get the same benefits as scalars when using unsafe-fp-math.
; Subtracting zero is free.
define <4 x float> @vec_fsub_zero(<4 x float> %x) {
; CHECK-LABEL: vec_fsub_zero:
-; CHECK-NOT: subps
-; CHECK-NOT: xorps
-; CHECK: retq
+; CHECK: # BB#0:
+; CHECK-NEXT: retq
%sub = fsub <4 x float> %x, zeroinitializer
ret <4 x float> %sub
}
@@ -15,9 +15,10 @@ define <4 x float> @vec_fsub_zero(<4 x f
; Negating doesn't require subtraction.
define <4 x float> @vec_fneg(<4 x float> %x) {
; CHECK-LABEL: vec_fneg:
-; CHECK: xorps {{.*}}LCP{{.*}}, %xmm0
-; CHECK-NOT: subps
-; CHECK-NEXT: retq
+; CHECK: # BB#0:
+; CHECK-NEXT: xorps {{.*}}(%rip), %xmm0
+; CHECK-NEXT: retq
%sub = fsub <4 x float> zeroinitializer, %x
ret <4 x float> %sub
}
+
Modified: llvm/trunk/test/CodeGen/X86/x32-lea-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x32-lea-1.ll?rev=306981&r1=306980&r2=306981&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x32-lea-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x32-lea-1.ll Sun Jul 2 07:50:35 2017
@@ -1,10 +1,16 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -O0 | FileCheck %s
-; CHECK: leal {{[-0-9]*}}(%r{{s|b}}p),
-; CHECK-NOT: leal {{[-0-9]*}}(%e{{s|b}}p),
define void @foo(i32** %p) {
+; CHECK-LABEL: foo:
+; CHECK: # BB#0:
+; CHECK-NEXT: leal -{{[0-9]+}}(%rsp), %eax
+; CHECK-NEXT: addl $16, %eax
+; CHECK-NEXT: movl %eax, (%edi)
+; CHECK-NEXT: retq
%a = alloca i32, i32 10
%addr = getelementptr i32, i32* %a, i32 4
store i32* %addr, i32** %p
ret void
}
+
Modified: llvm/trunk/test/CodeGen/X86/zext-shl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zext-shl.ll?rev=306981&r1=306980&r2=306981&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zext-shl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zext-shl.ll Sun Jul 2 07:50:35 2017
@@ -1,25 +1,26 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
-define i32 @t1(i8 zeroext %x) nounwind readnone ssp {
-entry:
+define i32 @t1(i8 zeroext %x) nounwind {
; CHECK-LABEL: t1:
-; CHECK: shll
-; CHECK-NOT: movzwl
-; CHECK: ret
- %0 = zext i8 %x to i16
- %1 = shl i16 %0, 5
- %2 = zext i16 %1 to i32
- ret i32 %2
+; CHECK: # BB#0:
+; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: shll $5, %eax
+; CHECK-NEXT: retl
+ %t0 = zext i8 %x to i16
+ %t1 = shl i16 %t0, 5
+ %t2 = zext i16 %t1 to i32
+ ret i32 %t2
}
-define i32 @t2(i8 zeroext %x) nounwind readnone ssp {
-entry:
+define i32 @t2(i8 zeroext %x) nounwind {
; CHECK-LABEL: t2:
-; CHECK: shrl
-; CHECK-NOT: movzwl
-; CHECK: ret
- %0 = zext i8 %x to i16
- %1 = lshr i16 %0, 3
- %2 = zext i16 %1 to i32
- ret i32 %2
+; CHECK: # BB#0:
+; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: shrl $3, %eax
+; CHECK-NEXT: retl
+ %t0 = zext i8 %x to i16
+ %t1 = lshr i16 %t0, 3
+ %t2 = zext i16 %t1 to i32
+ ret i32 %t2
}
Modified: llvm/trunk/test/CodeGen/X86/zext-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zext-trunc.ll?rev=306981&r1=306980&r2=306981&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zext-trunc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zext-trunc.ll Sun Jul 2 07:50:35 2017
@@ -1,11 +1,12 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; rdar://7570931
define i64 @foo(i64 %a, i64 %b) nounwind {
; CHECK-LABEL: foo:
-; CHECK: leal
-; CHECK-NOT: movl
-; CHECK: ret
+; CHECK: # BB#0:
+; CHECK-NEXT: leal (%rdi,%rsi), %eax
+; CHECK-NEXT: retq
%c = add i64 %a, %b
%d = trunc i64 %c to i32
%e = zext i32 %d to i64
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