[PATCH] D34602: [GlobalISel][X86] Support call ABI.
Oren Ben Simhon via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 2 03:56:39 PDT 2017
oren_ben_simhon added inline comments.
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Comment at: lib/Target/X86/X86CallLowering.cpp:300
+ SmallVector<ArgInfo, 8> SplitArgs;
+ for (auto &OrigArg : OrigArgs) {
+ splitToValueTypes(OrigArg, SplitArgs, DL, MRI,
----------------
Since you do not modify OrigArg you can define it as const &
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Comment at: lib/Target/X86/X86CallLowering.cpp:317
+ // constraint of that instruction.
+ if (Callee.isReg())
+ MIB->getOperand(0).setReg(constrainOperandRegClass(
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Could you please add a test that checks the case where the callee is a register?
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Comment at: lib/Target/X86/X86CallLowering.cpp:324
+ // Finally we can copy the returned value back into its virtual-register. In
+ // symmetry with the arugments, the physical register must be an
+ // implicit-define of the call instruction.
----------------
typo arguments
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Comment at: lib/Target/X86/X86CallLowering.cpp:327
+
+ if (OrigRet.Reg) {
+ SplitArgs.clear();
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Please consider having a separate method for handling call results.
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Comment at: lib/Target/X86/X86CallLowering.cpp:344
+
+ CallSeqStart.addImm(Handler.StackSize).addImm(0).addImm(0);
+
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Could you please document the immediate additions?
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Comment at: test/CodeGen/X86/GlobalISel/callingconv.ll:123
+
+declare void @trivial_callee()
+define void @test_trivial_call() {
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Could you please add tests that exercise arguments and return values that are spitted (like structures)?
https://reviews.llvm.org/D34602
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