[llvm] r306861 - [PowerPC] auto-generate check lines; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 30 12:20:54 PDT 2017
Author: spatel
Date: Fri Jun 30 12:20:54 2017
New Revision: 306861
URL: http://llvm.org/viewvc/llvm-project?rev=306861&view=rev
Log:
[PowerPC] auto-generate check lines; NFC
The existing check lines were more flexible, but these are
small enough tests that there shouldn't be much question
about register allocation. I've been hand-modifying this
file as I change the CGP memcmp expansion, but that's
more error-prone and time-consuming than just running the
update script.
Modified:
llvm/trunk/test/CodeGen/PowerPC/memcmp.ll
Modified: llvm/trunk/test/CodeGen/PowerPC/memcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/memcmp.ll?rev=306861&r1=306860&r2=306861&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/memcmp.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/memcmp.ll Fri Jun 30 12:20:54 2017
@@ -1,84 +1,72 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux < %s | FileCheck %s -check-prefix=CHECK
-; Check size 8
-; Function Attrs: nounwind readonly
-define signext i32 @test1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) local_unnamed_addr #0 {
-entry:
- %0 = bitcast i32* %buffer1 to i8*
- %1 = bitcast i32* %buffer2 to i8*
- %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 8) #2
+define signext i32 @memcmp8(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
+; CHECK-LABEL: memcmp8:
+; CHECK: # BB#0:
+; CHECK-NEXT: ldbrx 3, 0, 3
+; CHECK-NEXT: ldbrx 4, 0, 4
+; CHECK-NEXT: li 5, 1
+; CHECK-NEXT: li 12, -1
+; CHECK-NEXT: cmpld 3, 4
+; CHECK-NEXT: isel 3, 12, 5, 0
+; CHECK-NEXT: isel 3, 0, 3, 2
+; CHECK-NEXT: blr
+ %t0 = bitcast i32* %buffer1 to i8*
+ %t1 = bitcast i32* %buffer2 to i8*
+ %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 8)
ret i32 %call
-
-; CHECK-LABEL: @test1
-; CHECK: ldbrx [[LOAD1:[0-9]+]]
-; CHECK-NEXT: ldbrx [[LOAD2:[0-9]+]]
-; CHECK-NEXT: li [[LI:[0-9]+]], 1
-; CHECK-NEXT: li [[LI2:[0-9]+]], -1
-; CHECK-NEXT: cmpld [[LOAD1]], [[LOAD2]]
-; CHECK-NEXT: isel [[ISEL:[0-9]+]], [[LI2]], [[LI]], 0
-; CHECK-NEXT: isel [[ISEL2:[0-9]+]], 0, [[ISEL]], 2
-; CHECK-NEXT: blr
}
-; Check size 4
-; Function Attrs: nounwind readonly
-define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) local_unnamed_addr #0 {
-entry:
- %0 = bitcast i32* %buffer1 to i8*
- %1 = bitcast i32* %buffer2 to i8*
- %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 4) #2
+define signext i32 @memcmp4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
+; CHECK-LABEL: memcmp4:
+; CHECK: # BB#0:
+; CHECK-NEXT: lwbrx 3, 0, 3
+; CHECK-NEXT: lwbrx 4, 0, 4
+; CHECK-NEXT: li 5, 1
+; CHECK-NEXT: li 12, -1
+; CHECK-NEXT: cmplw 3, 4
+; CHECK-NEXT: isel 3, 12, 5, 0
+; CHECK-NEXT: isel 3, 0, 3, 2
+; CHECK-NEXT: blr
+ %t0 = bitcast i32* %buffer1 to i8*
+ %t1 = bitcast i32* %buffer2 to i8*
+ %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 4)
ret i32 %call
-
-; CHECK-LABEL: @test2
-; CHECK: lwbrx [[LOAD1:[0-9]+]]
-; CHECK-NEXT: lwbrx [[LOAD2:[0-9]+]]
-; CHECK-NEXT: li [[LI:[0-9]+]], 1
-; CHECK-NEXT: li [[LI2:[0-9]+]], -1
-; CHECK-NEXT: cmplw [[LOAD1]], [[LOAD2]]
-; CHECK-NEXT: isel [[ISEL:[0-9]+]], [[LI2]], [[LI]], 0
-; CHECK-NEXT: isel [[ISEL2:[0-9]+]], 0, [[ISEL]], 2
-; CHECK-NEXT: blr
}
-; Check size 2
-; Function Attrs: nounwind readonly
-define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) local_unnamed_addr #0 {
-entry:
- %0 = bitcast i32* %buffer1 to i8*
- %1 = bitcast i32* %buffer2 to i8*
- %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 2) #2
+define signext i32 @memcmp2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
+; CHECK-LABEL: memcmp2:
+; CHECK: # BB#0:
+; CHECK-NEXT: lhbrx 3, 0, 3
+; CHECK-NEXT: lhbrx 4, 0, 4
+; CHECK-NEXT: li 5, 1
+; CHECK-NEXT: li 12, -1
+; CHECK-NEXT: cmplw 3, 4
+; CHECK-NEXT: isel 3, 12, 5, 0
+; CHECK-NEXT: isel 3, 0, 3, 2
+; CHECK-NEXT: blr
+ %t0 = bitcast i32* %buffer1 to i8*
+ %t1 = bitcast i32* %buffer2 to i8*
+ %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 2)
ret i32 %call
-
-; CHECK-LABEL: @test3
-; CHECK: lhbrx [[LOAD1:[0-9]+]]
-; CHECK-NEXT: lhbrx [[LOAD2:[0-9]+]]
-; CHECK-NEXT: li [[LI:[0-9]+]], 1
-; CHECK-NEXT: li [[LI2:[0-9]+]], -1
-; CHECK-NEXT: cmplw [[LOAD1]], [[LOAD2]]
-; CHECK-NEXT: isel [[ISEL:[0-9]+]], [[LI2]], [[LI]], 0
-; CHECK-NEXT: isel [[ISEL2:[0-9]+]], 0, [[ISEL]], 2
-; CHECK-NEXT: blr
}
-; Check size 1
-; Function Attrs: nounwind readonly
-define signext i32 @test4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) local_unnamed_addr #0 {
-entry:
- %0 = bitcast i32* %buffer1 to i8*
- %1 = bitcast i32* %buffer2 to i8*
- %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 1) #2
+define signext i32 @memcmp1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
+; CHECK-LABEL: memcmp1:
+; CHECK: # BB#0:
+; CHECK-NEXT: lbz 3, 0(3)
+; CHECK-NEXT: lbz 4, 0(4)
+; CHECK-NEXT: li 5, 1
+; CHECK-NEXT: li 12, -1
+; CHECK-NEXT: cmplw 3, 4
+; CHECK-NEXT: isel 3, 12, 5, 0
+; CHECK-NEXT: isel 3, 0, 3, 2
+; CHECK-NEXT: blr
+ %t0 = bitcast i32* %buffer1 to i8*
+ %t1 = bitcast i32* %buffer2 to i8*
+ %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 1) #2
ret i32 %call
-
-; CHECK-LABEL: @test4
-; CHECK: lbz [[LOAD1:[0-9]+]]
-; CHECK-NEXT: lbz [[LOAD2:[0-9]+]]
-; CHECK-NEXT: li [[LI:[0-9]+]], 1
-; CHECK-NEXT: li [[LI2:[0-9]+]], -1
-; CHECK-NEXT: cmplw [[LOAD1]], [[LOAD2]]
-; CHECK-NEXT: isel [[ISEL:[0-9]+]], [[LI2]], [[LI]], 0
-; CHECK-NEXT: isel [[ISEL2:[0-9]+]], 0, [[ISEL]], 2
-; CHECK-NEXT: blr
}
-; Function Attrs: nounwind readonly
-declare signext i32 @memcmp(i8*, i8*, i64) #1
+declare signext i32 @memcmp(i8*, i8*, i64)
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