[llvm] r306821 - [SystemZ] Add missing high-word facility instructions

Ulrich Weigand via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 30 05:56:29 PDT 2017


Author: uweigand
Date: Fri Jun 30 05:56:29 2017
New Revision: 306821

URL: http://llvm.org/viewvc/llvm-project?rev=306821&view=rev
Log:
[SystemZ] Add missing high-word facility instructions

There are a few instructions provided by the high-word facility (z196)
that we cannot easily exploit for code generation.  This patch at least
adds those missing instructions for the assembler and disassembler.

This means that now all nonprivileged instructions up to z13 are
supported by the LLVM assembler / disassembler.


Modified:
    llvm/trunk/lib/Target/SystemZ/README.txt
    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
    llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td
    llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td
    llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td
    llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt
    llvm/trunk/test/MC/SystemZ/insn-bad-z196.s
    llvm/trunk/test/MC/SystemZ/insn-bad.s
    llvm/trunk/test/MC/SystemZ/insn-good-z196.s

Modified: llvm/trunk/lib/Target/SystemZ/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/README.txt?rev=306821&r1=306820&r2=306821&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/README.txt (original)
+++ llvm/trunk/lib/Target/SystemZ/README.txt Fri Jun 30 05:56:29 2017
@@ -67,6 +67,11 @@ We don't use ICM, STCM, or CLM.
 
 --
 
+We don't use ADD (LOGICAL) HIGH, SUBTRACT (LOGICAL) HIGH,
+or COMPARE (LOGICAL) HIGH yet.
+
+--
+
 DAGCombiner doesn't yet fold truncations of extended loads.  Functions like:
 
     unsigned long f (unsigned long x, unsigned short *y)

Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=306821&r1=306820&r2=306821&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Fri Jun 30 05:56:29 2017
@@ -883,6 +883,12 @@ let Defs = [CC], CCValues = 0xF, Compare
   }
   def AGFR : BinaryRRE<"agfr", 0xB918, null_frag, GR64, GR32>;
 
+  // Addition to a high register.
+  def AHHHR : BinaryRRFa<"ahhhr", 0xB9C8, null_frag, GRH32, GRH32, GRH32>,
+              Requires<[FeatureHighWord]>;
+  def AHHLR : BinaryRRFa<"ahhlr", 0xB9D8, null_frag, GRH32, GRH32, GR32>,
+              Requires<[FeatureHighWord]>;
+
   // Addition of signed 16-bit immediates.
   defm AHIMux : BinaryRIAndKPseudo<"ahimux", add, GRX32, imm32sx16>;
   defm AHI  : BinaryRIAndK<"ahi",  0xA7A, 0xECD8, add, GR32, imm32sx16>;
@@ -917,6 +923,12 @@ let Defs = [CC] in {
   }
   def ALGFR : BinaryRRE<"algfr", 0xB91A, null_frag, GR64, GR32>;
 
+  // Addition to a high register.
+  def ALHHHR : BinaryRRFa<"alhhhr", 0xB9CA, null_frag, GRH32, GRH32, GRH32>,
+               Requires<[FeatureHighWord]>;
+  def ALHHLR : BinaryRRFa<"alhhlr", 0xB9DA, null_frag, GRH32, GRH32, GR32>,
+               Requires<[FeatureHighWord]>;
+
   // Addition of signed 16-bit immediates.
   def ALHSIK  : BinaryRIE<"alhsik",  0xECDA, addc, GR32, imm32sx16>,
                 Requires<[FeatureDistinctOps]>;
@@ -927,6 +939,10 @@ let Defs = [CC] in {
   def ALFI  : BinaryRIL<"alfi",  0xC2B, addc, GR32, uimm32>;
   def ALGFI : BinaryRIL<"algfi", 0xC2A, addc, GR64, imm64zx32>;
 
+  // Addition of signed 32-bit immediates.
+  def ALSIH : BinaryRIL<"alsih", 0xCCA, null_frag, GRH32, simm32>,
+              Requires<[FeatureHighWord]>;
+
   // Addition of memory.
   defm AL   : BinaryRXPair<"al", 0x5E, 0xE35E, addc, GR32, load, 4>;
   def  ALGF : BinaryRXY<"algf", 0xE31A, addc, GR64, azextloadi32, 4>;
@@ -949,6 +965,10 @@ let Defs = [CC], Uses = [CC] in {
   def ALCG : BinaryRXY<"alcg", 0xE388, adde, GR64, load, 8>;
 }
 
+// Addition that does not modify the condition code.
+def ALSIHN : BinaryRIL<"alsihn", 0xCCB, null_frag, GRH32, simm32>,
+             Requires<[FeatureHighWord]>;
+
 //===----------------------------------------------------------------------===//
 // Subtraction
 //===----------------------------------------------------------------------===//
@@ -961,6 +981,12 @@ let Defs = [CC], CCValues = 0xF, Compare
   def SGFR : BinaryRRE<"sgfr", 0xB919, null_frag, GR64, GR32>;
   defm SGR : BinaryRREAndK<"sgr", 0xB909, 0xB9E9, sub, GR64, GR64>;
 
+  // Subtraction from a high register.
+  def SHHHR : BinaryRRFa<"shhhr", 0xB9C9, null_frag, GRH32, GRH32, GRH32>,
+              Requires<[FeatureHighWord]>;
+  def SHHLR : BinaryRRFa<"shhlr", 0xB9D9, null_frag, GRH32, GRH32, GR32>,
+              Requires<[FeatureHighWord]>;
+
   // Subtraction of memory.
   defm SH  : BinaryRXPair<"sh", 0x4B, 0xE37B, sub, GR32, asextloadi16, 2>;
   defm S   : BinaryRXPair<"s", 0x5B, 0xE35B, sub, GR32, load, 4>;
@@ -976,6 +1002,12 @@ let Defs = [CC] in {
   def SLGFR : BinaryRRE<"slgfr", 0xB91B, null_frag, GR64, GR32>;
   defm SLGR : BinaryRREAndK<"slgr", 0xB90B, 0xB9EB, subc, GR64, GR64>;
 
+  // Subtraction from a high register.
+  def SLHHHR : BinaryRRFa<"slhhhr", 0xB9CB, null_frag, GRH32, GRH32, GRH32>,
+               Requires<[FeatureHighWord]>;
+  def SLHHLR : BinaryRRFa<"slhhlr", 0xB9DB, null_frag, GRH32, GRH32, GR32>,
+               Requires<[FeatureHighWord]>;
+
   // Subtraction of unsigned 32-bit immediates.  These don't match
   // subc because we prefer addc for constants.
   def SLFI  : BinaryRIL<"slfi",  0xC25, null_frag, GR32, uimm32>;
@@ -1298,6 +1330,12 @@ let Defs = [CC], CCValues = 0xE in {
   def CGFR : CompareRRE<"cgfr", 0xB930, null_frag, GR64, GR32>;
   def CGR  : CompareRRE<"cgr",  0xB920, z_scmp,    GR64, GR64>;
 
+  // Comparison with a high register.
+  def CHHR : CompareRRE<"chhr", 0xB9CD, null_frag, GRH32, GRH32>,
+             Requires<[FeatureHighWord]>;
+  def CHLR : CompareRRE<"chlr", 0xB9DD, null_frag, GRH32, GR32>,
+             Requires<[FeatureHighWord]>;
+
   // Comparison with a signed 16-bit immediate.  CHIMux expands to CHI or CIH,
   // depending on the choice of register.
   def CHIMux : CompareRIPseudo<z_scmp, GRX32, imm32sx16>,
@@ -1344,6 +1382,12 @@ let Defs = [CC], CCValues = 0xE, IsLogic
   def CLGFR : CompareRRE<"clgfr", 0xB931, null_frag, GR64, GR32>;
   def CLGR  : CompareRRE<"clgr",  0xB921, z_ucmp,    GR64, GR64>;
 
+  // Comparison with a high register.
+  def CLHHR : CompareRRE<"clhhr", 0xB9CF, null_frag, GRH32, GRH32>,
+              Requires<[FeatureHighWord]>;
+  def CLHLR : CompareRRE<"clhlr", 0xB9DF, null_frag, GRH32, GR32>,
+              Requires<[FeatureHighWord]>;
+
   // Comparison with an unsigned 32-bit immediate.  CLFIMux expands to CLFI
   // or CLIH, depending on the choice of register.
   def CLFIMux : CompareRIPseudo<z_ucmp, GRX32, uimm32>,

Modified: llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td?rev=306821&r1=306820&r2=306821&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td Fri Jun 30 05:56:29 2017
@@ -353,6 +353,9 @@ def : InstRW<[FXa], (instregex "ALGF(I|R
 def : InstRW<[FXa], (instregex "ALGR(K)?$")>;
 def : InstRW<[FXa], (instregex "ALR(K)?$")>;
 def : InstRW<[FXa], (instregex "AR(K)?$")>;
+def : InstRW<[FXa], (instregex "A(L)?HHHR$")>;
+def : InstRW<[FXa, Lat2], (instregex "A(L)?HHLR$")>;
+def : InstRW<[FXa], (instregex "ALSIH(N)?$")>;
 def : InstRW<[FXb, LSU, Lat5], (instregex "A(L)?(G)?SI$")>;
 
 // Logical addition with carry
@@ -376,6 +379,8 @@ def : InstRW<[FXa], (instregex "SLGF(I|R
 def : InstRW<[FXa], (instregex "SLGR(K)?$")>;
 def : InstRW<[FXa], (instregex "SLR(K)?$")>;
 def : InstRW<[FXa], (instregex "SR(K)?$")>;
+def : InstRW<[FXa], (instregex "S(L)?HHHR$")>;
+def : InstRW<[FXa, Lat2], (instregex "S(L)?HHLR$")>;
 
 // Subtraction with borrow
 def : InstRW<[FXa, LSU, Lat6, GroupAlone], (instregex "SLB(G)?$")>;
@@ -506,6 +511,8 @@ def : InstRW<[FXb], (instregex "CLIH$")>
 def : InstRW<[FXb, LSU, Lat5], (instregex "CLI(Y)?$")>;
 def : InstRW<[FXb], (instregex "CLR$")>;
 def : InstRW<[FXb, LSU, Lat5], (instregex "CLRL$")>;
+def : InstRW<[FXb], (instregex "C(L)?HHR$")>;
+def : InstRW<[FXb, Lat2], (instregex "C(L)?HLR$")>;
 
 // Compare halfword
 def : InstRW<[FXb, LSU, Lat6], (instregex "CH(Y|RL)?$")>;

Modified: llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td?rev=306821&r1=306820&r2=306821&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td Fri Jun 30 05:56:29 2017
@@ -310,6 +310,9 @@ def : InstRW<[FXU], (instregex "ALGF(I|R
 def : InstRW<[FXU], (instregex "ALGR(K)?$")>;
 def : InstRW<[FXU], (instregex "ALR(K)?$")>;
 def : InstRW<[FXU], (instregex "AR(K)?$")>;
+def : InstRW<[FXU], (instregex "A(L)?HHHR$")>;
+def : InstRW<[FXU, FXU, Lat3], (instregex "A(L)?HHLR$")>;
+def : InstRW<[FXU], (instregex "ALSIH(N)?$")>;
 def : InstRW<[FXU, LSU, Lat5], (instregex "A(L)?G(SI)?$")>;
 
 // Logical addition with carry
@@ -333,6 +336,8 @@ def : InstRW<[FXU], (instregex "SLGF(I|R
 def : InstRW<[FXU], (instregex "SLGR(K)?$")>;
 def : InstRW<[FXU], (instregex "SLR(K)?$")>;
 def : InstRW<[FXU], (instregex "SR(K)?$")>;
+def : InstRW<[FXU], (instregex "S(L)?HHHR$")>;
+def : InstRW<[FXU, FXU, Lat3], (instregex "S(L)?HHLR$")>;
 
 // Subtraction with borrow
 def : InstRW<[FXU, LSU, Lat7, GroupAlone], (instregex "SLB(G)?$")>;
@@ -468,6 +473,8 @@ def : InstRW<[FXU], (instregex "CLIH$")>
 def : InstRW<[FXU, LSU, Lat5], (instregex "CLI(Y)?$")>;
 def : InstRW<[FXU], (instregex "CLR$")>;
 def : InstRW<[FXU, LSU, Lat5], (instregex "CLRL$")>;
+def : InstRW<[FXU], (instregex "C(L)?HHR$")>;
+def : InstRW<[FXU, FXU, Lat3], (instregex "C(L)?HLR$")>;
 
 // Compare halfword
 def : InstRW<[FXU, LSU, FXU, Lat6, GroupAlone], (instregex "CH(Y|RL)?$")>;

Modified: llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td?rev=306821&r1=306820&r2=306821&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td Fri Jun 30 05:56:29 2017
@@ -320,6 +320,9 @@ def : InstRW<[FXU], (instregex "ALGF(I|R
 def : InstRW<[FXU], (instregex "ALGR(K)?$")>;
 def : InstRW<[FXU], (instregex "ALR(K)?$")>;
 def : InstRW<[FXU], (instregex "AR(K)?$")>;
+def : InstRW<[FXU], (instregex "A(L)?HHHR$")>;
+def : InstRW<[FXU, Lat2], (instregex "A(L)?HHLR$")>;
+def : InstRW<[FXU], (instregex "ALSIH(N)?$")>;
 def : InstRW<[FXU, LSU, Lat5], (instregex "A(L)?G(SI)?$")>;
 
 // Logical addition with carry
@@ -343,6 +346,8 @@ def : InstRW<[FXU], (instregex "SLGF(I|R
 def : InstRW<[FXU], (instregex "SLGR(K)?$")>;
 def : InstRW<[FXU], (instregex "SLR(K)?$")>;
 def : InstRW<[FXU], (instregex "SR(K)?$")>;
+def : InstRW<[FXU], (instregex "S(L)?HHHR$")>;
+def : InstRW<[FXU, Lat2], (instregex "S(L)?HHLR$")>;
 
 // Subtraction with borrow
 def : InstRW<[FXU, LSU, Lat7, GroupAlone], (instregex "SLB(G)?$")>;
@@ -478,6 +483,8 @@ def : InstRW<[FXU], (instregex "CLIH$")>
 def : InstRW<[FXU, LSU, Lat5], (instregex "CLI(Y)?$")>;
 def : InstRW<[FXU], (instregex "CLR$")>;
 def : InstRW<[FXU, LSU, Lat5], (instregex "CLRL$")>;
+def : InstRW<[FXU], (instregex "C(L)?HHR$")>;
+def : InstRW<[FXU, Lat2], (instregex "C(L)?HLR$")>;
 
 // Compare halfword
 def : InstRW<[FXU, LSU, Lat6], (instregex "CH(Y|RL)?$")>;

Modified: llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt?rev=306821&r1=306820&r2=306821&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt (original)
+++ llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt Fri Jun 30 05:56:29 2017
@@ -406,6 +406,36 @@
 # CHECK: ah %r15, 0
 0x4a 0xf0 0x00 0x00
 
+# CHECK: ahhhr %r0, %r0, %r0
+0xb9 0xc8 0x00 0x00
+
+# CHECK: ahhhr %r0, %r0, %r15
+0xb9 0xc8 0xf0 0x00
+
+# CHECK: ahhhr %r0, %r15, %r0
+0xb9 0xc8 0x00 0x0f
+
+# CHECK: ahhhr %r15, %r0, %r0
+0xb9 0xc8 0x00 0xf0
+
+# CHECK: ahhhr %r7, %r8, %r9
+0xb9 0xc8 0x90 0x78
+
+# CHECK: ahhlr %r0, %r0, %r0
+0xb9 0xd8 0x00 0x00
+
+# CHECK: ahhlr %r0, %r0, %r15
+0xb9 0xd8 0xf0 0x00
+
+# CHECK: ahhlr %r0, %r15, %r0
+0xb9 0xd8 0x00 0x0f
+
+# CHECK: ahhlr %r15, %r0, %r0
+0xb9 0xd8 0x00 0xf0
+
+# CHECK: ahhlr %r7, %r8, %r9
+0xb9 0xd8 0x90 0x78
+
 # CHECK: ahi %r0, -32768
 0xa7 0x0a 0x80 0x00
 
@@ -754,6 +784,36 @@
 # CHECK: algsi 524287(%r15), 42
 0xeb 0x2a 0xff 0xff 0x7f 0x7e
 
+# CHECK: alhhhr %r0, %r0, %r0
+0xb9 0xca 0x00 0x00
+
+# CHECK: alhhhr %r0, %r0, %r15
+0xb9 0xca 0xf0 0x00
+
+# CHECK: alhhhr %r0, %r15, %r0
+0xb9 0xca 0x00 0x0f
+
+# CHECK: alhhhr %r15, %r0, %r0
+0xb9 0xca 0x00 0xf0
+
+# CHECK: alhhhr %r7, %r8, %r9
+0xb9 0xca 0x90 0x78
+
+# CHECK: alhhlr %r0, %r0, %r0
+0xb9 0xda 0x00 0x00
+
+# CHECK: alhhlr %r0, %r0, %r15
+0xb9 0xda 0xf0 0x00
+
+# CHECK: alhhlr %r0, %r15, %r0
+0xb9 0xda 0x00 0x0f
+
+# CHECK: alhhlr %r15, %r0, %r0
+0xb9 0xda 0x00 0xf0
+
+# CHECK: alhhlr %r7, %r8, %r9
+0xb9 0xda 0x90 0x78
+
 # CHECK: alhsik %r0, %r1, -32768
 0xec 0x01 0x80 0x00 0x00 0xda
 
@@ -826,6 +886,42 @@
 # CHECK: alsi 524287(%r15), 42
 0xeb 0x2a 0xff 0xff 0x7f 0x6e
 
+# CHECK: alsih %r0, -2147483648
+0xcc 0x0a 0x80 0x00 0x00 0x00
+
+# CHECK: alsih %r0, -1
+0xcc 0x0a 0xff 0xff 0xff 0xff
+
+# CHECK: alsih %r0, 0
+0xcc 0x0a 0x00 0x00 0x00 0x00
+
+# CHECK: alsih %r0, 1
+0xcc 0x0a 0x00 0x00 0x00 0x01
+
+# CHECK: alsih %r0, 2147483647
+0xcc 0x0a 0x7f 0xff 0xff 0xff
+
+# CHECK: alsih %r15, 0
+0xcc 0xfa 0x00 0x00 0x00 0x00
+
+# CHECK: alsihn %r0, -2147483648
+0xcc 0x0b 0x80 0x00 0x00 0x00
+
+# CHECK: alsihn %r0, -1
+0xcc 0x0b 0xff 0xff 0xff 0xff
+
+# CHECK: alsihn %r0, 0
+0xcc 0x0b 0x00 0x00 0x00 0x00
+
+# CHECK: alsihn %r0, 1
+0xcc 0x0b 0x00 0x00 0x00 0x01
+
+# CHECK: alsihn %r0, 2147483647
+0xcc 0x0b 0x7f 0xff 0xff 0xff
+
+# CHECK: alsihn %r15, 0
+0xcc 0xfb 0x00 0x00 0x00 0x00
+
 # CHECK: aly %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x5e
 
@@ -3058,6 +3154,18 @@
 # CHECK: chf %r15, 0
 0xe3 0xf0 0x00 0x00 0x00 0xcd
 
+# CHECK: chhr %r0, %r0
+0xb9 0xcd 0x00 0x00
+
+# CHECK: chhr %r0, %r15
+0xb9 0xcd 0x00 0x0f
+
+# CHECK: chhr %r15, %r0
+0xb9 0xcd 0x00 0xf0
+
+# CHECK: chhr %r7, %r8
+0xb9 0xcd 0x00 0x78
+
 # CHECK: chhsi 0, 0
 0xe5 0x54 0x00 0x00 0x00 0x00
 
@@ -3109,6 +3217,18 @@
 # CHECK: chi %r15, 0
 0xa7 0xfe 0x00 0x00
 
+# CHECK: chlr %r0, %r0
+0xb9 0xdd 0x00 0x00
+
+# CHECK: chlr %r0, %r15
+0xb9 0xdd 0x00 0x0f
+
+# CHECK: chlr %r15, %r0
+0xb9 0xdd 0x00 0xf0
+
+# CHECK: chlr %r7, %r8
+0xb9 0xdd 0x00 0x78
+
 # CHECK: chsi 0, 0
 0xe5 0x5c 0x00 0x00 0x00 0x00
 
@@ -3940,6 +4060,18 @@
 # CHECK: clhf %r15, 0
 0xe3 0xf0 0x00 0x00 0x00 0xcf
 
+# CHECK: clhhr %r0, %r0
+0xb9 0xcf 0x00 0x00
+
+# CHECK: clhhr %r0, %r15
+0xb9 0xcf 0x00 0x0f
+
+# CHECK: clhhr %r15, %r0
+0xb9 0xcf 0x00 0xf0
+
+# CHECK: clhhr %r7, %r8
+0xb9 0xcf 0x00 0x78
+
 # CHECK: clhhsi 0, 0
 0xe5 0x55 0x00 0x00 0x00 0x00
 
@@ -3961,6 +4093,18 @@
 # CHECK: clhhsi 4095(%r15), 42
 0xe5 0x55 0xff 0xff 0x00 0x2a
 
+# CHECK: clhlr %r0, %r0
+0xb9 0xdf 0x00 0x00
+
+# CHECK: clhlr %r0, %r15
+0xb9 0xdf 0x00 0x0f
+
+# CHECK: clhlr %r15, %r0
+0xb9 0xdf 0x00 0xf0
+
+# CHECK: clhlr %r7, %r8
+0xb9 0xdf 0x00 0x78
+
 # CHECK: cli 0, 0
 0x95 0x00 0x00 0x00
 
@@ -13332,6 +13476,36 @@
 # CHECK: sh %r15, 0
 0x4b 0xf0 0x00 0x00
 
+# CHECK: shhhr %r0, %r0, %r0
+0xb9 0xc9 0x00 0x00
+
+# CHECK: shhhr %r0, %r0, %r15
+0xb9 0xc9 0xf0 0x00
+
+# CHECK: shhhr %r0, %r15, %r0
+0xb9 0xc9 0x00 0x0f
+
+# CHECK: shhhr %r15, %r0, %r0
+0xb9 0xc9 0x00 0xf0
+
+# CHECK: shhhr %r7, %r8, %r9
+0xb9 0xc9 0x90 0x78
+
+# CHECK: shhlr %r0, %r0, %r0
+0xb9 0xd9 0x00 0x00
+
+# CHECK: shhlr %r0, %r0, %r15
+0xb9 0xd9 0xf0 0x00
+
+# CHECK: shhlr %r0, %r15, %r0
+0xb9 0xd9 0x00 0x0f
+
+# CHECK: shhlr %r15, %r0, %r0
+0xb9 0xd9 0x00 0xf0
+
+# CHECK: shhlr %r7, %r8, %r9
+0xb9 0xd9 0x90 0x78
+
 # CHECK: shy %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x7b
 
@@ -13746,6 +13920,36 @@
 # CHECK: slgrk %r2, %r3, %r4
 0xb9 0xeb 0x40 0x23
 
+# CHECK: slhhhr %r0, %r0, %r0
+0xb9 0xcb 0x00 0x00
+
+# CHECK: slhhhr %r0, %r0, %r15
+0xb9 0xcb 0xf0 0x00
+
+# CHECK: slhhhr %r0, %r15, %r0
+0xb9 0xcb 0x00 0x0f
+
+# CHECK: slhhhr %r15, %r0, %r0
+0xb9 0xcb 0x00 0xf0
+
+# CHECK: slhhhr %r7, %r8, %r9
+0xb9 0xcb 0x90 0x78
+
+# CHECK: slhhlr %r0, %r0, %r0
+0xb9 0xdb 0x00 0x00
+
+# CHECK: slhhlr %r0, %r0, %r15
+0xb9 0xdb 0xf0 0x00
+
+# CHECK: slhhlr %r0, %r15, %r0
+0xb9 0xdb 0x00 0x0f
+
+# CHECK: slhhlr %r15, %r0, %r0
+0xb9 0xdb 0x00 0xf0
+
+# CHECK: slhhlr %r7, %r8, %r9
+0xb9 0xdb 0x90 0x78
+
 # CHECK: sll %r0, 0
 0x89 0x00 0x00 0x00
 

Modified: llvm/trunk/test/MC/SystemZ/insn-bad-z196.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/SystemZ/insn-bad-z196.s?rev=306821&r1=306820&r2=306821&view=diff
==============================================================================
--- llvm/trunk/test/MC/SystemZ/insn-bad-z196.s (original)
+++ llvm/trunk/test/MC/SystemZ/insn-bad-z196.s Fri Jun 30 05:56:29 2017
@@ -43,6 +43,22 @@
 	aih	%r0, (1 << 31)
 
 #CHECK: error: invalid operand
+#CHECK: alsih	%r0, (-1 << 31) - 1
+#CHECK: error: invalid operand
+#CHECK: alsih	%r0, (1 << 31)
+
+	alsih	%r0, (-1 << 31) - 1
+	alsih	%r0, (1 << 31)
+
+#CHECK: error: invalid operand
+#CHECK: alsihn	%r0, (-1 << 31) - 1
+#CHECK: error: invalid operand
+#CHECK: alsihn	%r0, (1 << 31)
+
+	alsihn	%r0, (-1 << 31) - 1
+	alsihn	%r0, (1 << 31)
+
+#CHECK: error: invalid operand
 #CHECK: axtra	%f0, %f0, %f0, -1
 #CHECK: error: invalid operand
 #CHECK: axtra	%f0, %f0, %f0, 16

Modified: llvm/trunk/test/MC/SystemZ/insn-bad.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/SystemZ/insn-bad.s?rev=306821&r1=306820&r2=306821&view=diff
==============================================================================
--- llvm/trunk/test/MC/SystemZ/insn-bad.s (original)
+++ llvm/trunk/test/MC/SystemZ/insn-bad.s Fri Jun 30 05:56:29 2017
@@ -127,6 +127,16 @@
 	ah	%r0, -1
 	ah	%r0, 4096
 
+#CHECK: error: instruction requires: high-word
+#CHECK: ahhhr	%r0, %r0, %r0
+
+	ahhhr	%r0, %r0, %r0
+
+#CHECK: error: instruction requires: high-word
+#CHECK: ahhlr	%r0, %r0, %r0
+
+	ahhlr	%r0, %r0, %r0
+
 #CHECK: error: invalid operand
 #CHECK: ahi	%r0, -32769
 #CHECK: error: invalid operand
@@ -222,6 +232,16 @@
 
 	algrk	%r2,%r3,%r4
 
+#CHECK: error: instruction requires: high-word
+#CHECK: alhhhr	%r0, %r0, %r0
+
+	alhhhr	%r0, %r0, %r0
+
+#CHECK: error: instruction requires: high-word
+#CHECK: alhhlr	%r0, %r0, %r0
+
+	alhhlr	%r0, %r0, %r0
+
 #CHECK: error: instruction requires: distinct-ops
 #CHECK: alhsik	%r1, %r2, 3
 
@@ -266,6 +286,16 @@
 	alsi	0, -129
 	alsi	0, 128
 
+#CHECK: error: instruction requires: high-word
+#CHECK: alsih	%r0, 0
+
+	alsih	%r0, 0
+
+#CHECK: error: instruction requires: high-word
+#CHECK: alsihn	%r0, 0
+
+	alsihn	%r0, 0
+
 #CHECK: error: invalid operand
 #CHECK: aly	%r0, -524289
 #CHECK: error: invalid operand
@@ -1176,6 +1206,11 @@
 
 	chf	%r0, 0
 
+#CHECK: error: instruction requires: high-word
+#CHECK: chhr	%r0, %r0
+
+	chhr	%r0, %r0
+
 #CHECK: error: invalid operand
 #CHECK: chhsi	-1, 0
 #CHECK: error: invalid operand
@@ -1204,6 +1239,11 @@
 	chi	%r0, 32768
 	chi	%r0, foo
 
+#CHECK: error: instruction requires: high-word
+#CHECK: chlr	%r0, %r0
+
+	chlr	%r0, %r0
+
 #CHECK: error: offset out of range
 #CHECK: chrl	%r0, -0x1000000002
 #CHECK: error: offset out of range
@@ -1628,6 +1668,11 @@
 
 	clhf	%r0, 0
 
+#CHECK: error: instruction requires: high-word
+#CHECK: clhhr	%r0, %r0
+
+	clhhr	%r0, %r0
+
 #CHECK: error: invalid operand
 #CHECK: clhhsi	-1, 0
 #CHECK: error: invalid operand
@@ -1645,6 +1690,11 @@
 	clhhsi	0, -1
 	clhhsi	0, 65536
 
+#CHECK: error: instruction requires: high-word
+#CHECK: clhlr	%r0, %r0
+
+	clhlr	%r0, %r0
+
 #CHECK: error: offset out of range
 #CHECK: clhrl	%r0, -0x1000000002
 #CHECK: error: offset out of range
@@ -5403,6 +5453,16 @@
 	sh	%r0, -1
 	sh	%r0, 4096
 
+#CHECK: error: instruction requires: high-word
+#CHECK: shhhr	%r0, %r0, %r0
+
+	shhhr	%r0, %r0, %r0
+
+#CHECK: error: instruction requires: high-word
+#CHECK: shhlr	%r0, %r0, %r0
+
+	shhlr	%r0, %r0, %r0
+
 #CHECK: error: invalid operand
 #CHECK: shy	%r0, -524289
 #CHECK: error: invalid operand
@@ -5547,6 +5607,16 @@
 
 	slgrk	%r2,%r3,%r4
 
+#CHECK: error: instruction requires: high-word
+#CHECK: slhhhr	%r0, %r0, %r0
+
+	slhhhr	%r0, %r0, %r0
+
+#CHECK: error: instruction requires: high-word
+#CHECK: slhhlr	%r0, %r0, %r0
+
+	slhhlr	%r0, %r0, %r0
+
 #CHECK: error: invalid operand
 #CHECK: sll	%r0,-1
 #CHECK: error: invalid operand

Modified: llvm/trunk/test/MC/SystemZ/insn-good-z196.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/SystemZ/insn-good-z196.s?rev=306821&r1=306820&r2=306821&view=diff
==============================================================================
--- llvm/trunk/test/MC/SystemZ/insn-good-z196.s (original)
+++ llvm/trunk/test/MC/SystemZ/insn-good-z196.s Fri Jun 30 05:56:29 2017
@@ -46,6 +46,30 @@
 	agrk	%r15,%r0,%r0
 	agrk	%r7,%r8,%r9
 
+#CHECK: ahhhr	%r0, %r0, %r0           # encoding: [0xb9,0xc8,0x00,0x00]
+#CHECK: ahhhr	%r0, %r0, %r15          # encoding: [0xb9,0xc8,0xf0,0x00]
+#CHECK: ahhhr	%r0, %r15, %r0          # encoding: [0xb9,0xc8,0x00,0x0f]
+#CHECK: ahhhr	%r15, %r0, %r0          # encoding: [0xb9,0xc8,0x00,0xf0]
+#CHECK: ahhhr	%r7, %r8, %r9           # encoding: [0xb9,0xc8,0x90,0x78]
+
+	ahhhr	%r0, %r0, %r0
+	ahhhr	%r0, %r0, %r15
+	ahhhr	%r0, %r15, %r0
+	ahhhr	%r15, %r0, %r0
+	ahhhr	%r7, %r8, %r9
+
+#CHECK: ahhlr	%r0, %r0, %r0           # encoding: [0xb9,0xd8,0x00,0x00]
+#CHECK: ahhlr	%r0, %r0, %r15          # encoding: [0xb9,0xd8,0xf0,0x00]
+#CHECK: ahhlr	%r0, %r15, %r0          # encoding: [0xb9,0xd8,0x00,0x0f]
+#CHECK: ahhlr	%r15, %r0, %r0          # encoding: [0xb9,0xd8,0x00,0xf0]
+#CHECK: ahhlr	%r7, %r8, %r9           # encoding: [0xb9,0xd8,0x90,0x78]
+
+	ahhlr	%r0, %r0, %r0
+	ahhlr	%r0, %r0, %r15
+	ahhlr	%r0, %r15, %r0
+	ahhlr	%r15, %r0, %r0
+	ahhlr	%r7, %r8, %r9
+
 #CHECK: ahik	%r0, %r0, -32768        # encoding: [0xec,0x00,0x80,0x00,0x00,0xd8]
 #CHECK: ahik	%r0, %r0, -1            # encoding: [0xec,0x00,0xff,0xff,0x00,0xd8]
 #CHECK: ahik	%r0, %r0, 0             # encoding: [0xec,0x00,0x00,0x00,0x00,0xd8]
@@ -108,6 +132,30 @@
 	algrk	%r15,%r0,%r0
 	algrk	%r7,%r8,%r9
 
+#CHECK: alhhhr	%r0, %r0, %r0           # encoding: [0xb9,0xca,0x00,0x00]
+#CHECK: alhhhr	%r0, %r0, %r15          # encoding: [0xb9,0xca,0xf0,0x00]
+#CHECK: alhhhr	%r0, %r15, %r0          # encoding: [0xb9,0xca,0x00,0x0f]
+#CHECK: alhhhr	%r15, %r0, %r0          # encoding: [0xb9,0xca,0x00,0xf0]
+#CHECK: alhhhr	%r7, %r8, %r9           # encoding: [0xb9,0xca,0x90,0x78]
+
+	alhhhr	%r0, %r0, %r0
+	alhhhr	%r0, %r0, %r15
+	alhhhr	%r0, %r15, %r0
+	alhhhr	%r15, %r0, %r0
+	alhhhr	%r7, %r8, %r9
+
+#CHECK: alhhlr	%r0, %r0, %r0           # encoding: [0xb9,0xda,0x00,0x00]
+#CHECK: alhhlr	%r0, %r0, %r15          # encoding: [0xb9,0xda,0xf0,0x00]
+#CHECK: alhhlr	%r0, %r15, %r0          # encoding: [0xb9,0xda,0x00,0x0f]
+#CHECK: alhhlr	%r15, %r0, %r0          # encoding: [0xb9,0xda,0x00,0xf0]
+#CHECK: alhhlr	%r7, %r8, %r9           # encoding: [0xb9,0xda,0x90,0x78]
+
+	alhhlr	%r0, %r0, %r0
+	alhhlr	%r0, %r0, %r15
+	alhhlr	%r0, %r15, %r0
+	alhhlr	%r15, %r0, %r0
+	alhhlr	%r7, %r8, %r9
+
 #CHECK: alhsik	%r0, %r0, -32768        # encoding: [0xec,0x00,0x80,0x00,0x00,0xda]
 #CHECK: alhsik	%r0, %r0, -1            # encoding: [0xec,0x00,0xff,0xff,0x00,0xda]
 #CHECK: alhsik	%r0, %r0, 0             # encoding: [0xec,0x00,0x00,0x00,0x00,0xda]
@@ -138,6 +186,34 @@
 	alrk	%r15,%r0,%r0
 	alrk	%r7,%r8,%r9
 
+#CHECK: alsih	%r0, -2147483648        # encoding: [0xcc,0x0a,0x80,0x00,0x00,0x00]
+#CHECK: alsih	%r0, -1                 # encoding: [0xcc,0x0a,0xff,0xff,0xff,0xff]
+#CHECK: alsih	%r0, 0                  # encoding: [0xcc,0x0a,0x00,0x00,0x00,0x00]
+#CHECK: alsih	%r0, 1                  # encoding: [0xcc,0x0a,0x00,0x00,0x00,0x01]
+#CHECK: alsih	%r0, 2147483647         # encoding: [0xcc,0x0a,0x7f,0xff,0xff,0xff]
+#CHECK: alsih	%r15, 0                 # encoding: [0xcc,0xfa,0x00,0x00,0x00,0x00]
+
+	alsih	%r0, -1 << 31
+	alsih	%r0, -1
+	alsih	%r0, 0
+	alsih	%r0, 1
+	alsih	%r0, (1 << 31) - 1
+	alsih	%r15, 0
+
+#CHECK: alsihn	%r0, -2147483648        # encoding: [0xcc,0x0b,0x80,0x00,0x00,0x00]
+#CHECK: alsihn	%r0, -1                 # encoding: [0xcc,0x0b,0xff,0xff,0xff,0xff]
+#CHECK: alsihn	%r0, 0                  # encoding: [0xcc,0x0b,0x00,0x00,0x00,0x00]
+#CHECK: alsihn	%r0, 1                  # encoding: [0xcc,0x0b,0x00,0x00,0x00,0x01]
+#CHECK: alsihn	%r0, 2147483647         # encoding: [0xcc,0x0b,0x7f,0xff,0xff,0xff]
+#CHECK: alsihn	%r15, 0                 # encoding: [0xcc,0xfb,0x00,0x00,0x00,0x00]
+
+	alsihn	%r0, -1 << 31
+	alsihn	%r0, -1
+	alsihn	%r0, 0
+	alsihn	%r0, 1
+	alsihn	%r0, (1 << 31) - 1
+	alsihn	%r15, 0
+
 #CHECK: ark	%r0, %r0, %r0           # encoding: [0xb9,0xf8,0x00,0x00]
 #CHECK: ark	%r0, %r0, %r15          # encoding: [0xb9,0xf8,0xf0,0x00]
 #CHECK: ark	%r0, %r15, %r0          # encoding: [0xb9,0xf8,0x00,0x0f]
@@ -531,6 +607,26 @@
 	chf	%r0, 524287(%r15,%r1)
 	chf	%r15, 0
 
+#CHECK: chhr	%r0, %r0                # encoding: [0xb9,0xcd,0x00,0x00]
+#CHECK: chhr	%r0, %r15               # encoding: [0xb9,0xcd,0x00,0x0f]
+#CHECK: chhr	%r15, %r0               # encoding: [0xb9,0xcd,0x00,0xf0]
+#CHECK: chhr	%r7, %r8                # encoding: [0xb9,0xcd,0x00,0x78]
+
+	chhr	%r0,%r0
+	chhr	%r0,%r15
+	chhr	%r15,%r0
+	chhr	%r7,%r8
+
+#CHECK: chlr	%r0, %r0                # encoding: [0xb9,0xdd,0x00,0x00]
+#CHECK: chlr	%r0, %r15               # encoding: [0xb9,0xdd,0x00,0x0f]
+#CHECK: chlr	%r15, %r0               # encoding: [0xb9,0xdd,0x00,0xf0]
+#CHECK: chlr	%r7, %r8                # encoding: [0xb9,0xdd,0x00,0x78]
+
+	chlr	%r0,%r0
+	chlr	%r0,%r15
+	chlr	%r15,%r0
+	chlr	%r7,%r8
+
 #CHECK: cih	%r0, -2147483648        # encoding: [0xcc,0x0d,0x80,0x00,0x00,0x00]
 #CHECK: cih	%r0, -1                 # encoding: [0xcc,0x0d,0xff,0xff,0xff,0xff]
 #CHECK: cih	%r0, 0                  # encoding: [0xcc,0x0d,0x00,0x00,0x00,0x00]
@@ -707,6 +803,26 @@
 	clhf	%r0, 524287(%r15,%r1)
 	clhf	%r15, 0
 
+#CHECK: clhhr	%r0, %r0                # encoding: [0xb9,0xcf,0x00,0x00]
+#CHECK: clhhr	%r0, %r15               # encoding: [0xb9,0xcf,0x00,0x0f]
+#CHECK: clhhr	%r15, %r0               # encoding: [0xb9,0xcf,0x00,0xf0]
+#CHECK: clhhr	%r7, %r8                # encoding: [0xb9,0xcf,0x00,0x78]
+
+	clhhr	%r0,%r0
+	clhhr	%r0,%r15
+	clhhr	%r15,%r0
+	clhhr	%r7,%r8
+
+#CHECK: clhlr	%r0, %r0                # encoding: [0xb9,0xdf,0x00,0x00]
+#CHECK: clhlr	%r0, %r15               # encoding: [0xb9,0xdf,0x00,0x0f]
+#CHECK: clhlr	%r15, %r0               # encoding: [0xb9,0xdf,0x00,0xf0]
+#CHECK: clhlr	%r7, %r8                # encoding: [0xb9,0xdf,0x00,0x78]
+
+	clhlr	%r0,%r0
+	clhlr	%r0,%r15
+	clhlr	%r15,%r0
+	clhlr	%r7,%r8
+
 #CHECK: clih	%r0, 0                  # encoding: [0xcc,0x0f,0x00,0x00,0x00,0x00]
 #CHECK: clih	%r0, 1                  # encoding: [0xcc,0x0f,0x00,0x00,0x00,0x01]
 #CHECK: clih	%r0, 4294967295         # encoding: [0xcc,0x0f,0xff,0xff,0xff,0xff]
@@ -1713,6 +1829,30 @@
 	sgrk	%r15,%r0,%r0
 	sgrk	%r7,%r8,%r9
 
+#CHECK: shhhr	%r0, %r0, %r0           # encoding: [0xb9,0xc9,0x00,0x00]
+#CHECK: shhhr	%r0, %r0, %r15          # encoding: [0xb9,0xc9,0xf0,0x00]
+#CHECK: shhhr	%r0, %r15, %r0          # encoding: [0xb9,0xc9,0x00,0x0f]
+#CHECK: shhhr	%r15, %r0, %r0          # encoding: [0xb9,0xc9,0x00,0xf0]
+#CHECK: shhhr	%r7, %r8, %r9           # encoding: [0xb9,0xc9,0x90,0x78]
+
+	shhhr	%r0, %r0, %r0
+	shhhr	%r0, %r0, %r15
+	shhhr	%r0, %r15, %r0
+	shhhr	%r15, %r0, %r0
+	shhhr	%r7, %r8, %r9
+
+#CHECK: shhlr	%r0, %r0, %r0           # encoding: [0xb9,0xd9,0x00,0x00]
+#CHECK: shhlr	%r0, %r0, %r15          # encoding: [0xb9,0xd9,0xf0,0x00]
+#CHECK: shhlr	%r0, %r15, %r0          # encoding: [0xb9,0xd9,0x00,0x0f]
+#CHECK: shhlr	%r15, %r0, %r0          # encoding: [0xb9,0xd9,0x00,0xf0]
+#CHECK: shhlr	%r7, %r8, %r9           # encoding: [0xb9,0xd9,0x90,0x78]
+
+	shhlr	%r0, %r0, %r0
+	shhlr	%r0, %r0, %r15
+	shhlr	%r0, %r15, %r0
+	shhlr	%r15, %r0, %r0
+	shhlr	%r7, %r8, %r9
+
 #CHECK: slak	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xdd]
 #CHECK: slak	%r15, %r1, 0            # encoding: [0xeb,0xf1,0x00,0x00,0x00,0xdd]
 #CHECK: slak	%r1, %r15, 0            # encoding: [0xeb,0x1f,0x00,0x00,0x00,0xdd]
@@ -1751,6 +1891,30 @@
 	slgrk	%r15,%r0,%r0
 	slgrk	%r7,%r8,%r9
 
+#CHECK: slhhhr	%r0, %r0, %r0           # encoding: [0xb9,0xcb,0x00,0x00]
+#CHECK: slhhhr	%r0, %r0, %r15          # encoding: [0xb9,0xcb,0xf0,0x00]
+#CHECK: slhhhr	%r0, %r15, %r0          # encoding: [0xb9,0xcb,0x00,0x0f]
+#CHECK: slhhhr	%r15, %r0, %r0          # encoding: [0xb9,0xcb,0x00,0xf0]
+#CHECK: slhhhr	%r7, %r8, %r9           # encoding: [0xb9,0xcb,0x90,0x78]
+
+	slhhhr	%r0, %r0, %r0
+	slhhhr	%r0, %r0, %r15
+	slhhhr	%r0, %r15, %r0
+	slhhhr	%r15, %r0, %r0
+	slhhhr	%r7, %r8, %r9
+
+#CHECK: slhhlr	%r0, %r0, %r0           # encoding: [0xb9,0xdb,0x00,0x00]
+#CHECK: slhhlr	%r0, %r0, %r15          # encoding: [0xb9,0xdb,0xf0,0x00]
+#CHECK: slhhlr	%r0, %r15, %r0          # encoding: [0xb9,0xdb,0x00,0x0f]
+#CHECK: slhhlr	%r15, %r0, %r0          # encoding: [0xb9,0xdb,0x00,0xf0]
+#CHECK: slhhlr	%r7, %r8, %r9           # encoding: [0xb9,0xdb,0x90,0x78]
+
+	slhhlr	%r0, %r0, %r0
+	slhhlr	%r0, %r0, %r15
+	slhhlr	%r0, %r15, %r0
+	slhhlr	%r15, %r0, %r0
+	slhhlr	%r7, %r8, %r9
+
 #CHECK: sllk	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xdf]
 #CHECK: sllk	%r15, %r1, 0            # encoding: [0xeb,0xf1,0x00,0x00,0x00,0xdf]
 #CHECK: sllk	%r1, %r15, 0            # encoding: [0xeb,0x1f,0x00,0x00,0x00,0xdf]




More information about the llvm-commits mailing list