[PATCH] D34726: AMDGPU/SI: Don not insert an instruction into worklist twice in movetovalu
Changpeng Fang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 28 16:22:11 PDT 2017
cfang updated this revision to Diff 104542.
cfang added a comment.
Update based on Matt's comments.
TODO:
1. improve the search in the worklist!
https://reviews.llvm.org/D34726
Files:
lib/Target/AMDGPU/SIInstrInfo.cpp
test/CodeGen/AMDGPU/move-to-valu-worklist.ll
Index: test/CodeGen/AMDGPU/move-to-valu-worklist.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/move-to-valu-worklist.ll
@@ -0,0 +1,22 @@
+; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck %s
+
+; CHECK-LABEL: {{^}}in_worklist_once:
+; CHECK: buffer_load_dword
+; CHECK: BB0_1:
+; CHECK: s_branch BB0_1
+define amdgpu_kernel void @in_worklist_once() #0 {
+bb:
+ %tmp = load i64, i64* undef
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb
+ %tmp2 = phi i64 [ undef, %bb ], [ %tmp16, %bb1 ]
+ %tmp3 = phi i64 [ %tmp, %bb ], [ undef, %bb1 ]
+ %tmp11 = shl i64 %tmp2, 14
+ %tmp13 = xor i64 %tmp11, %tmp2
+ %tmp15 = and i64 %tmp3, %tmp13
+ %tmp16 = xor i64 %tmp15, %tmp3
+ br label %bb1
+}
+
+attributes #0 = { nounwind }
Index: lib/Target/AMDGPU/SIInstrInfo.cpp
===================================================================
--- lib/Target/AMDGPU/SIInstrInfo.cpp
+++ lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -3856,7 +3856,9 @@
E = MRI.use_end(); I != E;) {
MachineInstr &UseMI = *I->getParent();
if (!canReadVGPR(UseMI, I.getOperandNo())) {
- Worklist.push_back(&UseMI);
+ // Do not add to worklist twice!
+ if (Worklist.end() == llvm::find(Worklist, &UseMI))
+ Worklist.push_back(&UseMI);
do {
++I;
@@ -3941,7 +3943,9 @@
return;
if (MI.findRegisterUseOperandIdx(AMDGPU::SCC) != -1)
- Worklist.push_back(&MI);
+ // Do not add to worklist twice!
+ if (Worklist.end() == llvm::find(Worklist, &MI))
+ Worklist.push_back(&MI);
}
}
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