[PATCH] D34474: [RFC] [AArch64] Add a win64 specific aarch64 calling convention, for va_list handling

[Mandeep Singh Grang via Phabricator via llvm-commits]

mgrang added a comment.

@mstorsjo I have an MSVC compiler for ARM64 and I found that it always passes floats in interger registers:

  float a = 1.1;
  float b = 2.1;
  float c = 3.1;
  float d = 4.1;
  float e = 5.1;
  float f = 6.1;
  float g = 7.1;
  float h = 8.1;
  float i = 9.1;
  float j = 10.1;
  
  printf("%f %f %f %f %f %f %f %f %f %f", a, b, c, d, e, f, g, h, i, j);
  
  0000000000000058: BD0033F0  str         s16,[sp,#0x30]
  000000000000005C: BD4033F0  ldr         s16,[sp,#0x30]
  0000000000000060: 1E22C219  fcvt        d25,s16
  0000000000000064: BD4037F0  ldr         s16,[sp,#0x34]
  0000000000000068: 1E22C218  fcvt        d24,s16
  000000000000006C: BD403BF0  ldr         s16,[sp,#0x38]
  0000000000000070: 1E22C217  fcvt        d23,s16
  0000000000000074: BD403FF0  ldr         s16,[sp,#0x3C]
  0000000000000078: 1E22C216  fcvt        d22,s16
  000000000000007C: BD4043F0  ldr         s16,[sp,#0x40]
  0000000000000080: 1E22C215  fcvt        d21,s16
  0000000000000084: BD4047F0  ldr         s16,[sp,#0x44]
  0000000000000088: 1E22C214  fcvt        d20,s16
  000000000000008C: BD404BF0  ldr         s16,[sp,#0x48]
  0000000000000090: 1E22C213  fcvt        d19,s16
  0000000000000094: BD404FF0  ldr         s16,[sp,#0x4C]
  0000000000000098: 1E22C212  fcvt        d18,s16
  000000000000009C: BD4053F0  ldr         s16,[sp,#0x50]
  00000000000000A0: 1E22C211  fcvt        d17,s16
  00000000000000A4: BD4057F0  ldr         s16,[sp,#0x54]
  00000000000000A8: 1E22C210  fcvt        d16,s16
  00000000000000AC: FD000BF9  str         d25,[sp,#0x10]
  00000000000000B0: FD0007F8  str         d24,[sp,#8]
  00000000000000B4: FD0003F7  str         d23,[sp]
  00000000000000B8: 9E6602C7  fmov        x7,d22
  00000000000000BC: 9E6602A6  fmov        x6,d21
  00000000000000C0: 9E660285  fmov        x5,d20
  00000000000000C4: 9E660264  fmov        x4,d19
  00000000000000C8: 9E660243  fmov        x3,d18
  00000000000000CC: 9E660222  fmov        x2,d17
  00000000000000D0: 9E660201  fmov        x1,d16
  00000000000000D4: 90000008  adrp        x8,$SG5071
  00000000000000D8: 91000100  add         x0,x8,$SG5071
  00000000000000DC: 94000000  bl          printf


https://reviews.llvm.org/D34474