[llvm] r306552 - [globalisel][tablegen] Post-commit review nits for r306388. NFC
Daniel Sanders via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 28 08:16:04 PDT 2017
Author: dsanders
Date: Wed Jun 28 08:16:03 2017
New Revision: 306552
URL: http://llvm.org/viewvc/llvm-project?rev=306552&view=rev
Log:
[globalisel][tablegen] Post-commit review nits for r306388. NFC
One early exit and a missing assert string.
Modified:
llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp
Modified: llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp?rev=306552&r1=306551&r2=306552&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp Wed Jun 28 08:16:03 2017
@@ -1891,45 +1891,39 @@ Expected<RuleMatcher> GlobalISelEmitter:
if (!Dst->getChild(0)->isLeaf())
return failedImport("EXTRACT_SUBREG child #1 is not a leaf");
- if (DefInit *SubRegInit =
- dyn_cast<DefInit>(Dst->getChild(1)->getLeafValue())) {
- // Constrain the result to the same register bank as the operand.
- Record *DstIOpRec =
- getInitValueAsRegClass(Dst->getChild(0)->getLeafValue());
-
- if (DstIOpRec == nullptr)
- return failedImport("EXTRACT_SUBREG operand #1 isn't a register class");
-
- CodeGenSubRegIndex *SubIdx = CGRegs.getSubRegIdx(SubRegInit->getDef());
- CodeGenRegisterClass *SrcRC = CGRegs.getRegClass(
- getInitValueAsRegClass(Dst->getChild(0)->getLeafValue()));
-
- // It would be nice to leave this constraint implicit but we're required
- // to pick a register class so constrain the result to a register class
- // that can hold the correct MVT.
- //
- // FIXME: This may introduce an extra copy if the chosen class doesn't
- // actually contain the subregisters.
- assert(Src->getExtTypes().size() == 1);
-
- const auto &SrcRCDstRCPair =
- SrcRC->getMatchingSubClassWithSubRegs(CGRegs, SubIdx);
- assert(SrcRCDstRCPair->second && "Couldn't find a matching subclass");
- M.addAction<ConstrainOperandToRegClassAction>("NewI", 0,
- *SrcRCDstRCPair->second);
- M.addAction<ConstrainOperandToRegClassAction>("NewI", 1,
- *SrcRCDstRCPair->first);
-
- // We're done with this pattern! It's eligible for GISel emission; return
- // it.
- ++NumPatternImported;
- return std::move(M);
- }
-
- return failedImport("EXTRACT_SUBREG child #1 is not a subreg index");
- }
-
- M.addAction<ConstrainOperandsToDefinitionAction>("NewI");
+ DefInit *SubRegInit = dyn_cast<DefInit>(Dst->getChild(1)->getLeafValue());
+ if (!SubRegInit)
+ return failedImport("EXTRACT_SUBREG child #1 is not a subreg index");
+
+ // Constrain the result to the same register bank as the operand.
+ Record *DstIOpRec =
+ getInitValueAsRegClass(Dst->getChild(0)->getLeafValue());
+
+ if (DstIOpRec == nullptr)
+ return failedImport("EXTRACT_SUBREG operand #1 isn't a register class");
+
+ CodeGenSubRegIndex *SubIdx = CGRegs.getSubRegIdx(SubRegInit->getDef());
+ CodeGenRegisterClass *SrcRC = CGRegs.getRegClass(
+ getInitValueAsRegClass(Dst->getChild(0)->getLeafValue()));
+
+ // It would be nice to leave this constraint implicit but we're required
+ // to pick a register class so constrain the result to a register class
+ // that can hold the correct MVT.
+ //
+ // FIXME: This may introduce an extra copy if the chosen class doesn't
+ // actually contain the subregisters.
+ assert(Src->getExtTypes().size() == 1 &&
+ "Expected Src of EXTRACT_SUBREG to have one result type");
+
+ const auto &SrcRCDstRCPair =
+ SrcRC->getMatchingSubClassWithSubRegs(CGRegs, SubIdx);
+ assert(SrcRCDstRCPair->second && "Couldn't find a matching subclass");
+ M.addAction<ConstrainOperandToRegClassAction>("NewI", 0,
+ *SrcRCDstRCPair->second);
+ M.addAction<ConstrainOperandToRegClassAction>("NewI", 1,
+ *SrcRCDstRCPair->first);
+ } else
+ M.addAction<ConstrainOperandsToDefinitionAction>("NewI");
// We're done with this pattern! It's eligible for GISel emission; return it.
++NumPatternImported;
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