[llvm] r306550 - [AArch64] AArch64CondBrTuningPass generates wrong branch instructions

[Alexandros Lamprineas via llvm-commits]

Author: alelab01
Date: Wed Jun 28 08:09:11 2017
New Revision: 306550

URL: http://llvm.org/viewvc/llvm-project?rev=306550&view=rev
Log:
[AArch64] AArch64CondBrTuningPass generates wrong branch instructions

Some conditional branch instructions generated by this pass are checking
the wrong condition code. The instructions TBZ and TBNZ are transformed
into B.GE and B.LT instead of B.PL and B.MI respectively. They should
only be checking the Negative bit.

Differential Revision: https://reviews.llvm.org/D34743

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64CondBrTuning.cpp
    llvm/trunk/test/CodeGen/AArch64/cond-br-tuning.ll

Modified: llvm/trunk/lib/Target/AArch64/AArch64CondBrTuning.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64CondBrTuning.cpp?rev=306550&r1=306549&r2=306550&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64CondBrTuning.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64CondBrTuning.cpp Wed Jun 28 08:09:11 2017
@@ -22,7 +22,7 @@
 ///    cbz w8, .LBB1_2 -> b.eq .LBB1_2
 ///
 /// 3) sub w8, w0, w1       -> subs w8, w0, w1   ; w8 has multiple uses.
-///    tbz w8, #31, .LBB6_2 -> b.ge .LBB6_2
+///    tbz w8, #31, .LBB6_2 -> b.pl .LBB6_2
 ///
 //===----------------------------------------------------------------------===//
 
@@ -129,11 +129,11 @@ MachineInstr *AArch64CondBrTuning::conve
     break;
   case AArch64::TBZW:
   case AArch64::TBZX:
-    CC = AArch64CC::GE;
+    CC = AArch64CC::PL;
     break;
   case AArch64::TBNZW:
   case AArch64::TBNZX:
-    CC = AArch64CC::LT;
+    CC = AArch64CC::MI;
     break;
   }
   return BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(AArch64::Bcc))

Modified: llvm/trunk/test/CodeGen/AArch64/cond-br-tuning.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/cond-br-tuning.ll?rev=306550&r1=306549&r2=306550&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/cond-br-tuning.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/cond-br-tuning.ll Wed Jun 28 08:09:11 2017
@@ -83,7 +83,7 @@ L2:
 
 ; CHECK-LABEL: test_add_tbz:
 ; CHECK: adds
-; CHECK: b.ge
+; CHECK: b.pl
 ; CHECK: ret
 define void @test_add_tbz(i32 %a, i32 %b, i32* %ptr) {
 entry:
@@ -99,7 +99,7 @@ L2:
 
 ; CHECK-LABEL: test_subs_tbz:
 ; CHECK: subs
-; CHECK: b.ge
+; CHECK: b.pl
 ; CHECK: ret
 define void @test_subs_tbz(i32 %a, i32 %b, i32* %ptr) {
 entry:
@@ -115,7 +115,7 @@ L2:
 
 ; CHECK-LABEL: test_add_tbnz
 ; CHECK: adds
-; CHECK: b.lt
+; CHECK: b.mi
 ; CHECK: ret
 define void @test_add_tbnz(i32 %a, i32 %b, i32* %ptr) {
 entry:
@@ -131,7 +131,7 @@ L2:
 
 ; CHECK-LABEL: test_subs_tbnz
 ; CHECK: subs
-; CHECK: b.lt
+; CHECK: b.mi
 ; CHECK: ret
 define void @test_subs_tbnz(i32 %a, i32 %b, i32* %ptr) {
 entry: