[PATCH] D34559: [X86][DAG] Switch X86 Target to post-legalized store merge

[Nirav Dave via Phabricator via llvm-commits]

niravd added inline comments.


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Comment at: test/CodeGen/X86/oddshuffles.ll:86
 ; SSE42-NEXT:    pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
-; SSE42-NEXT:    pextrd $2, %xmm0, 8(%rdi)
-; SSE42-NEXT:    movq %xmm1, (%rdi)
+; SSE42-NEXT:    movdqa %xmm1, (%rdi)
 ; SSE42-NEXT:    retq
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RKSimon wrote:
> This is scaring me - what is the reasoning behind permitting the store of a <4 x i32> and not just the <3 x i32> ?
This is due to a mistake in a parent patch which dropped a type size check. It should be fixed now. 


https://reviews.llvm.org/D34559