[llvm] r306441 - RenameIndependentSubregs: Fix infinite loop
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 27 11:28:10 PDT 2017
Author: arsenm
Date: Tue Jun 27 11:28:10 2017
New Revision: 306441
URL: http://llvm.org/viewvc/llvm-project?rev=306441&view=rev
Log:
RenameIndependentSubregs: Fix infinite loop
Apparently this replacement can really be substituting the
same as the original register. Avoid restarting the loop
when there's been no change in the register uses.
Added:
llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir
- copied, changed from r306440, llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-invalid-mac-operands.mir
Removed:
llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-invalid-mac-operands.mir
Modified:
llvm/trunk/lib/CodeGen/RenameIndependentSubregs.cpp
Modified: llvm/trunk/lib/CodeGen/RenameIndependentSubregs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RenameIndependentSubregs.cpp?rev=306441&r1=306440&r2=306441&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RenameIndependentSubregs.cpp (original)
+++ llvm/trunk/lib/CodeGen/RenameIndependentSubregs.cpp Tue Jun 27 11:28:10 2017
@@ -243,7 +243,8 @@ void RenameIndependentSubregs::rewriteOp
unsigned VReg = Intervals[ID]->reg;
MO.setReg(VReg);
- if (MO.isTied()) {
+
+ if (MO.isTied() && Reg != VReg) {
/// Undef use operands are not tracked in the equivalence class but need
/// to be update if they are tied.
MO.getParent()->substituteRegister(Reg, VReg, 0, TRI);
Removed: llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-invalid-mac-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-invalid-mac-operands.mir?rev=306440&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-invalid-mac-operands.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-invalid-mac-operands.mir (removed)
@@ -1,136 +0,0 @@
-# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass=simple-register-coalescing,rename-independent-subregs -o - %s | FileCheck -check-prefix=GCN %s
----
-
-# GCN-LABEL: name: mac_invalid_operands
-# GCN: undef %18.sub0 = V_MAC_F32_e32 undef %3, undef %9, undef %18.sub0, implicit %exec
-
-name: mac_invalid_operands
-alignment: 0
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: vreg_128 }
- - { id: 1, class: vreg_128 }
- - { id: 2, class: sgpr_64 }
- - { id: 3, class: vgpr_32 }
- - { id: 4, class: vgpr_32 }
- - { id: 5, class: vgpr_32 }
- - { id: 6, class: vgpr_32 }
- - { id: 7, class: sreg_64 }
- - { id: 8, class: vgpr_32 }
- - { id: 9, class: vgpr_32 }
- - { id: 10, class: vreg_64 }
- - { id: 11, class: vreg_64 }
- - { id: 12, class: vreg_128 }
- - { id: 13, class: vreg_128 }
- - { id: 14, class: vgpr_32 }
- - { id: 15, class: vreg_64 }
- - { id: 16, class: vgpr_32 }
- - { id: 17, class: vreg_128 }
-body: |
- bb.0:
- successors: %bb.2, %bb.1
-
- %7 = V_CMP_NEQ_F32_e64 0, 0, 0, undef %3, 0, 0, implicit %exec
- %vcc = COPY killed %7
- S_CBRANCH_VCCZ %bb.2, implicit killed %vcc
-
- bb.1:
- successors: %bb.3
-
- %4 = V_ADD_F32_e32 undef %6, undef %5, implicit %exec
- undef %12.sub0 = COPY killed %4
- %17 = COPY killed %12
- S_BRANCH %bb.3
-
- bb.2:
- successors: %bb.3
-
- %8 = V_MAC_F32_e32 undef %3, undef %9, undef %8, implicit %exec
- undef %13.sub0 = COPY %8
- %13.sub1 = COPY %8
- %13.sub2 = COPY killed %8
- %0 = COPY killed %13
- %17 = COPY killed %0
-
- bb.3:
- %1 = COPY killed %17
- FLAT_STORE_DWORD undef %10, %1.sub2, 0, 0, 0, implicit %exec, implicit %flat_scr
- %14 = COPY %1.sub1
- %16 = COPY killed %1.sub0
- undef %15.sub0 = COPY killed %16
- %15.sub1 = COPY killed %14
- FLAT_STORE_DWORDX2 undef %11, killed %15, 0, 0, 0, implicit %exec, implicit %flat_scr
- S_ENDPGM
-
-...
----
-# Make sure others uses after the mac are properly handled and not
-# left unreplaced due to iterator issues from substituteRegister.
-
-# GCN-LABEL: name: vreg_does_not_dominate
-
-# GCN: undef %8.sub1 = V_MAC_F32_e32 undef %2, undef %1, undef %8.sub1, implicit %exec
-# GCN: undef %7.sub0 = V_MOV_B32_e32 0, implicit %exec
-# GCN: undef %9.sub2 = COPY %7.sub0
-
-# GCN: undef %6.sub3 = V_ADD_F32_e32 undef %3, undef %3, implicit %exec
-# GCN: undef %7.sub0 = V_ADD_F32_e64 0, 0, 0, 0, 0, 0, implicit %exec
-# GCN: %8.sub1 = V_ADD_F32_e32 %8.sub1, %8.sub1, implicit %exec
-
-# GCN: BUFFER_STORE_DWORD_OFFEN %6.sub3, %0,
-# GCN: BUFFER_STORE_DWORD_OFFEN %9.sub2, %0,
-# GCN: BUFFER_STORE_DWORD_OFFEN %8.sub1, %0,
-# GCN: BUFFER_STORE_DWORD_OFFEN %7.sub0, %0,
-name: vreg_does_not_dominate
-alignment: 0
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: vgpr_32, preferred-register: '' }
- - { id: 1, class: vgpr_32, preferred-register: '' }
- - { id: 2, class: vgpr_32, preferred-register: '' }
- - { id: 3, class: vgpr_32, preferred-register: '' }
- - { id: 4, class: vgpr_32, preferred-register: '' }
- - { id: 5, class: sreg_64, preferred-register: '' }
- - { id: 6, class: vreg_128, preferred-register: '' }
-liveins:
- - { reg: '%vgpr0', virtual-reg: '%0' }
- - { reg: '%sgpr30_sgpr31', virtual-reg: '%5' }
-body: |
- bb.0:
- successors: %bb.2, %bb.1
- liveins: %vgpr0, %sgpr30_sgpr31, %sgpr5
-
- %5 = COPY %sgpr30_sgpr31
- %0 = COPY %vgpr0
- undef %6.sub1 = V_MAC_F32_e32 undef %2, undef %1, undef %6.sub1, implicit %exec
- %6.sub0 = V_MOV_B32_e32 0, implicit %exec
- %6.sub2 = COPY %6.sub0
- S_CBRANCH_VCCNZ %bb.2, implicit undef %vcc
- S_BRANCH %bb.1
-
- bb.1:
- successors: %bb.2
-
- %6.sub3 = V_ADD_F32_e32 undef %3, undef %3, implicit %exec
- %6.sub0 = V_ADD_F32_e64 0, 0, 0, 0, 0, 0, implicit %exec
- %6.sub1 = V_ADD_F32_e32 %6.sub1, %6.sub1, implicit %exec
- %6.sub2 = COPY %6.sub0
-
- bb.2:
- BUFFER_STORE_DWORD_OFFEN %6.sub3, %0, %sgpr0_sgpr1_sgpr2_sgpr3, %sgpr4, 12, 0, 0, 0, implicit %exec
- BUFFER_STORE_DWORD_OFFEN %6.sub2, %0, %sgpr0_sgpr1_sgpr2_sgpr3, %sgpr4, 8, 0, 0, 0, implicit %exec
- BUFFER_STORE_DWORD_OFFEN %6.sub1, %0, %sgpr0_sgpr1_sgpr2_sgpr3, %sgpr4, 4, 0, 0, 0, implicit %exec
- BUFFER_STORE_DWORD_OFFEN %6.sub0, %0, %sgpr0_sgpr1_sgpr2_sgpr3, %sgpr4, 0, 0, 0, 0, implicit %exec
- %sgpr30_sgpr31 = COPY %5
- %sgpr5 = COPY %sgpr5
- S_SETPC_B64_return %sgpr30_sgpr31, implicit %sgpr5
-
-...
Copied: llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir (from r306440, llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-invalid-mac-operands.mir)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir?p2=llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir&p1=llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-invalid-mac-operands.mir&r1=306440&r2=306441&rev=306441&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-invalid-mac-operands.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir Tue Jun 27 11:28:10 2017
@@ -134,3 +134,22 @@ body: |
S_SETPC_B64_return %sgpr30_sgpr31, implicit %sgpr5
...
+
+# GCN-LABEL: name: inf_loop_tied_operand
+# GCN: bb.0:
+# GCN-NEXT: undef %2.sub0 = V_MAC_F32_e32 1073741824, undef %0, undef %2.sub0, implicit %exec
+# GCN-NEXT: dead undef %3.sub1 = COPY %2.sub0
+
+name: inf_loop_tied_operand
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: vgpr_32, preferred-register: '' }
+ - { id: 1, class: vgpr_32, preferred-register: '' }
+ - { id: 2, class: vreg_128, preferred-register: '' }
+body: |
+ bb.0:
+ %1 = V_MAC_F32_e32 1073741824, undef %0, undef %1, implicit %exec
+ undef %2.sub0 = COPY %1
+ %2.sub1 = COPY %1
+
+...
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