[llvm] r306390 - [ARM] GlobalISel: Support G_SELECT for pointers
Diana Picus via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 27 03:29:50 PDT 2017
Author: rovka
Date: Tue Jun 27 03:29:50 2017
New Revision: 306390
URL: http://llvm.org/viewvc/llvm-project?rev=306390&view=rev
Log:
[ARM] GlobalISel: Support G_SELECT for pointers
All we need to do is mark it as legal, otherwise it's just like s32.
Modified:
llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp
llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-isel.ll
llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
Modified: llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp?rev=306390&r1=306389&r2=306390&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp Tue Jun 27 03:29:50 2017
@@ -85,6 +85,7 @@ ARMLegalizerInfo::ARMLegalizerInfo(const
setAction({G_GEP, 1, s32}, Legal);
setAction({G_SELECT, s32}, Legal);
+ setAction({G_SELECT, p0}, Legal);
setAction({G_SELECT, 1, s1}, Legal);
setAction({G_CONSTANT, s32}, Legal);
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir?rev=306390&r1=306389&r2=306390&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir Tue Jun 27 03:29:50 2017
@@ -42,7 +42,8 @@
define void @test_constant_imm() { ret void }
define void @test_constant_cimm() { ret void }
- define void @test_select() { ret void }
+ define void @test_select_s32() { ret void }
+ define void @test_select_ptr() { ret void }
define void @test_soft_fp_double() #0 { ret void }
@@ -1102,8 +1103,8 @@ body: |
BX_RET 14, _, implicit %r0
...
---
-name: test_select
-# CHECK-LABEL: name: test_select
+name: test_select_s32
+# CHECK-LABEL: name: test_select_s32
legalized: true
regBankSelected: true
selected: false
@@ -1134,6 +1135,41 @@ body: |
; CHECK: %r0 = COPY [[RES]]
BX_RET 14, _, implicit %r0
+ ; CHECK: BX_RET 14, _, implicit %r0
+...
+---
+name: test_select_ptr
+# CHECK-LABEL: name: test_select_ptr
+legalized: true
+regBankSelected: true
+selected: false
+# CHECK: selected: true
+registers:
+ - { id: 0, class: gprb }
+ - { id: 1, class: gprb }
+ - { id: 2, class: gprb }
+ - { id: 3, class: gprb }
+body: |
+ bb.0:
+ liveins: %r0, %r1, %r2
+
+ %0(p0) = COPY %r0
+ ; CHECK: [[VREGX:%[0-9]+]] = COPY %r0
+
+ %1(p0) = COPY %r1
+ ; CHECK: [[VREGY:%[0-9]+]] = COPY %r1
+
+ %2(s1) = COPY %r2
+ ; CHECK: [[VREGC:%[0-9]+]] = COPY %r2
+
+ %3(p0) = G_SELECT %2(s1), %0, %1
+ ; CHECK: CMPri [[VREGC]], 0, 14, _, implicit-def %cpsr
+ ; CHECK: [[RES:%[0-9]+]] = MOVCCr [[VREGX]], [[VREGY]], 0, %cpsr
+
+ %r0 = COPY %3(p0)
+ ; CHECK: %r0 = COPY [[RES]]
+
+ BX_RET 14, _, implicit %r0
; CHECK: BX_RET 14, _, implicit %r0
...
---
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-isel.ll?rev=306390&r1=306389&r2=306390&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-isel.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-isel.ll Tue Jun 27 03:29:50 2017
@@ -410,3 +410,13 @@ entry:
%r = select i1 %cond, i32 %a, i32 %b
ret i32 %r
}
+
+define arm_aapcscc i32* @test_select_ptr(i32* %a, i32* %b, i1 %cond) {
+; CHECK-LABEL: test_select_ptr
+; CHECK: cmp r2, #0
+; CHECK: moveq r0, r1
+; CHECK: bx lr
+entry:
+ %r = select i1 %cond, i32* %a, i32* %b
+ ret i32* %r
+}
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir?rev=306390&r1=306389&r2=306390&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir Tue Jun 27 03:29:50 2017
@@ -40,6 +40,7 @@
define void @test_icmp_s32() { ret void }
define void @test_select_s32() { ret void }
+ define void @test_select_ptr() { ret void }
define void @test_fadd_s32() #0 { ret void }
define void @test_fadd_s64() #0 { ret void }
@@ -803,6 +804,32 @@ body: |
BX_RET 14, _, implicit %r0
...
---
+name: test_select_ptr
+# CHECK-LABEL: name: test_select_ptr
+legalized: false
+# CHECK: legalized: true
+regBankSelected: false
+selected: false
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+body: |
+ bb.0:
+ liveins: %r0, %r1, %r2
+
+ %0(p0) = COPY %r0
+ %1(p0) = COPY %r1
+ %2(s1) = COPY %r2
+ %3(p0) = G_SELECT %2(s1), %0, %1
+ ; G_SELECT with p0 is legal, so we should find it unchanged in the output
+ ; CHECK: {{%[0-9]+}}(p0) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
+ %r0 = COPY %3(p0)
+ BX_RET 14, _, implicit %r0
+...
+---
name: test_fadd_s32
# CHECK-LABEL: name: test_fadd_s32
legalized: false
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