r305918 and "Bad machine code: Using an undefined physical register"

[Jasty, Ananth via llvm-commits]

It looks like it's trying to use bl for a blr, so the address mode flags definitely make sense.

Ananth

> On Jun 26, 2017, at 9:37 AM, Tim Northover <tnorthover at apple.com> wrote:
> 
>> On 26 Jun 2017, at 08:30, Christof Douma <Christof.Douma at arm.com> wrote:
>> 
>> I would be surprised if this patch is responsible, as from the code it looks that it only changes behaviour if feature ‘lse’ is selected (part of armv8.1a and later) while the log shows that built targets armv7a (which does not have that feature). Anyway, I’ve added the author of this patch (Ananth Jasty) to the recipients list so that he is aware of the issue.
> 
> It's definitely AArch64 code that's failing in the error message (%X1 isn't a register in the 32-bit ARM backend). The compiler is producing multiple architectures at once.
> 
> But I'd be more inclined to blame r305885 if it's in range. That altered how register flags are placed on the pass that's actually failing. At the moment I can't quite see how it could produce this with code that wasn't broken before though.
> 
> Cheers.
> 
> Tim.