[PATCH] D34630: [Power9] Add additional patterns to recognize and transform insertelt/extractelt to vinsert[h|b]/vextractu[h|b] instructions.

[Graham Yiu via Phabricator via llvm-commits]

gyiu created this revision.

- Added code to recognize insertelement on v8i16/v16i8 vectors and transform to use vinserth/vinsertb instructions.
- Added code to recognize extractelement on v8i16/v16i8 vectors, specifically extracting the elements from doubleword element 1 of a VSR, to use vextractuh/vextractub instructions.  The normal code-gen requires an extra xxswapd instruction to get the elements into the proper half of the register before a mfvsrd.
- Added LIT tests for above patterns.


Repository:
  rL LLVM

https://reviews.llvm.org/D34630

Files:
  lib/Target/PowerPC/PPCISelLowering.cpp
  lib/Target/PowerPC/PPCInstrVSX.td
  test/CodeGen/PowerPC/p9-vinsert-vextract.ll

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