[PATCH] D34589: AMDGPU/GlobalISel: Mark 32-bit G_SHL as legal

[Tom Stellard via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL306298: AMDGPU/GlobalISel: Mark 32-bit G_SHL as legal (authored by tstellar).

Repository:
  rL LLVM

https://reviews.llvm.org/D34589

Files:
  llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir


Index: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -69,6 +69,8 @@
   setAction({G_SELECT, S32}, Legal);
   setAction({G_SELECT, 1, S1}, Legal);
 
+  setAction({G_SHL, S32}, Legal);
+
   setAction({G_STORE, S32}, Legal);
   setAction({G_STORE, 1, P1}, Legal);
 
Index: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
@@ -0,0 +1,18 @@
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
+
+---
+name:            test_shl
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body: |
+  bb.0.entry:
+    liveins: %vgpr0, %vgpr1
+    ; CHECK-LABEL: name: test_shl
+    ; CHECK: %2(s32) = G_SHL %0, %1
+
+    %0(s32) = COPY %vgpr0
+    %1(s32) = COPY %vgpr1
+    %2(s32) = G_SHL %0, %1
+...


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