[llvm] r306246 - [X86] Add test case for PR15705
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 25 09:12:45 PDT 2017
Author: rksimon
Date: Sun Jun 25 09:12:45 2017
New Revision: 306246
URL: http://llvm.org/viewvc/llvm-project?rev=306246&view=rev
Log:
[X86] Add test case for PR15705
Added:
llvm/trunk/test/CodeGen/X86/pr15705.ll
Added: llvm/trunk/test/CodeGen/X86/pr15705.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr15705.ll?rev=306246&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr15705.ll (added)
+++ llvm/trunk/test/CodeGen/X86/pr15705.ll Sun Jun 25 09:12:45 2017
@@ -0,0 +1,48 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+
+define i32 @PR15705(i32 %x, i32 %a, i32 %b, i32 %c) #0 {
+; X86-LABEL: PR15705:
+; X86: # BB#0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: cmpl %ecx, %edx
+; X86-NEXT: je .LBB0_4
+; X86-NEXT: # BB#1: # %if.end
+; X86-NEXT: cmpl %eax, %edx
+; X86-NEXT: jne .LBB0_3
+; X86-NEXT: # BB#2:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: .LBB0_3: # %if.end
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: .LBB0_4: # %return
+; X86-NEXT: retl
+;
+; X64-LABEL: PR15705:
+; X64: # BB#0: # %entry
+; X64-NEXT: cmpl %esi, %edi
+; X64-NEXT: je .LBB0_2
+; X64-NEXT: # BB#1: # %if.end
+; X64-NEXT: cmpl %edx, %edi
+; X64-NEXT: cmovel %ecx, %esi
+; X64-NEXT: movl %esi, %edx
+; X64-NEXT: .LBB0_2: # %return
+; X64-NEXT: movl %edx, %eax
+; X64-NEXT: retq
+entry:
+ %cmp = icmp eq i32 %x, %a
+ br i1 %cmp, label %return, label %if.end
+
+if.end:
+ %cmp1 = icmp eq i32 %x, %b
+ %c.a = select i1 %cmp1, i32 %c, i32 %a
+ br label %return
+
+return:
+ %retval.0 = phi i32 [ %b, %entry ], [ %c.a, %if.end ]
+ ret i32 %retval.0
+}
+
+attributes #0 = { nounwind readnone ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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