[PATCH] D34500: [AMDGPU] Combine and x, (sext cc from i1) => select cc, x, 0

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 22 15:03:01 PDT 2017


rampitec updated this revision to Diff 103650.
rampitec retitled this revision from "[AMDGPU] Combine and x, (sext cc from i1) => select cc, 0, x" to "[AMDGPU] Combine and x, (sext cc from i1) => select cc, x, 0".
rampitec added a comment.

Fixed operand order


https://reviews.llvm.org/D34500

Files:
  lib/Target/AMDGPU/SIISelLowering.cpp
  test/CodeGen/AMDGPU/combine-and-sext-bool.ll
  test/CodeGen/AMDGPU/combine-cond-add-sub.ll

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