[llvm] r306007 - [mips] Allow $AT to be used as a register name

[Petar Jovanovic via llvm-commits]

Author: petarj
Date: Thu Jun 22 10:24:16 2017
New Revision: 306007

URL: http://llvm.org/viewvc/llvm-project?rev=306007&view=rev
Log:
[mips] Allow $AT to be used as a register name

This patch allows $AT to be used as a register name in assembly files.
Currently only $at is recognized as a valid register name.

Patch by Stanislav Ocovaj.

Differential Revision: https://reviews.llvm.org/D34348

Modified:
    llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
    llvm/trunk/test/MC/Mips/mips-register-names-o32.s
    llvm/trunk/test/MC/Mips/mips64-register-names-n32-n64.s
    llvm/trunk/test/MC/Mips/mips64-register-names-o32.s

Modified: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=306007&r1=306006&r2=306007&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp Thu Jun 22 10:24:16 2017
@@ -5107,7 +5107,7 @@ int MipsAsmParser::matchCPURegisterName(
 
   CC = StringSwitch<unsigned>(Name)
            .Case("zero", 0)
-           .Case("at", 1)
+           .Cases("at", "AT", 1)
            .Case("a0", 4)
            .Case("a1", 5)
            .Case("a2", 6)

Modified: llvm/trunk/test/MC/Mips/mips-register-names-o32.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips-register-names-o32.s?rev=306007&r1=306006&r2=306007&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips-register-names-o32.s (original)
+++ llvm/trunk/test/MC/Mips/mips-register-names-o32.s Thu Jun 22 10:24:16 2017
@@ -7,6 +7,7 @@
 .set noat
 addiu	$zero, $zero, 0 # CHECK: encoding: [0x24,0x00,0x00,0x00]
 addiu	$at, $zero, 0   # CHECK: encoding: [0x24,0x01,0x00,0x00]
+addiu	$AT, $zero, 0   # CHECK: encoding: [0x24,0x01,0x00,0x00]
 addiu	$v0, $zero, 0   # CHECK: encoding: [0x24,0x02,0x00,0x00]
 addiu	$v1, $zero, 0   # CHECK: encoding: [0x24,0x03,0x00,0x00]
 addiu	$a0, $zero, 0   # CHECK: encoding: [0x24,0x04,0x00,0x00]

Modified: llvm/trunk/test/MC/Mips/mips64-register-names-n32-n64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips64-register-names-n32-n64.s?rev=306007&r1=306006&r2=306007&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips64-register-names-n32-n64.s (original)
+++ llvm/trunk/test/MC/Mips/mips64-register-names-n32-n64.s Thu Jun 22 10:24:16 2017
@@ -13,6 +13,7 @@
 .set noat
 daddiu	$zero, $zero, 0     # CHECK: encoding: [0x64,0x00,0x00,0x00]
 daddiu	$at, $zero, 0       # CHECK: encoding: [0x64,0x01,0x00,0x00]
+daddiu	$AT, $zero, 0       # CHECK: encoding: [0x64,0x01,0x00,0x00]
 daddiu	$v0, $zero, 0       # CHECK: encoding: [0x64,0x02,0x00,0x00]
 daddiu	$v1, $zero, 0       # CHECK: encoding: [0x64,0x03,0x00,0x00]
 daddiu	$a0, $zero, 0       # CHECK: encoding: [0x64,0x04,0x00,0x00]

Modified: llvm/trunk/test/MC/Mips/mips64-register-names-o32.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips64-register-names-o32.s?rev=306007&r1=306006&r2=306007&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips64-register-names-o32.s (original)
+++ llvm/trunk/test/MC/Mips/mips64-register-names-o32.s Thu Jun 22 10:24:16 2017
@@ -8,6 +8,7 @@
 .set noat
 addiu	$zero, $zero, 0 # CHECK: encoding: [0x24,0x00,0x00,0x00]
 addiu	$at, $zero, 0   # CHECK: encoding: [0x24,0x01,0x00,0x00]
+addiu	$AT, $zero, 0   # CHECK: encoding: [0x24,0x01,0x00,0x00]
 addiu	$v0, $zero, 0   # CHECK: encoding: [0x24,0x02,0x00,0x00]
 addiu	$v1, $zero, 0   # CHECK: encoding: [0x24,0x03,0x00,0x00]
 addiu	$a0, $zero, 0   # CHECK: encoding: [0x24,0x04,0x00,0x00]