[llvm] r305951 - Add Aarch64 ldst-opt test.
Nirav Dave via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 21 13:50:07 PDT 2017
Author: niravd
Date: Wed Jun 21 15:50:07 2017
New Revision: 305951
URL: http://llvm.org/viewvc/llvm-project?rev=305951&view=rev
Log:
Add Aarch64 ldst-opt test.
Modified:
llvm/trunk/test/CodeGen/AArch64/ldst-opt.ll
Modified: llvm/trunk/test/CodeGen/AArch64/ldst-opt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/ldst-opt.ll?rev=305951&r1=305950&r2=305951&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/ldst-opt.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/ldst-opt.ll Wed Jun 21 15:50:07 2017
@@ -1608,3 +1608,63 @@ entry:
store <4 x double> zeroinitializer, <4 x double>* %p
ret void
}
+
+; Verify that non-consecutive merges do not generate q0
+define void @merge_multiple_128bit_stores(i64* %p) {
+; CHECK-LABEL: merge_multiple_128bit_stores
+; CHECK: // %entry
+; NOSTRICTALIGN-NEXT: movi v[[REG:[0-9]]].2d, #0000000000000000
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: stur q0, [x0, #24]
+; NOSTRICTALIGN-NEXT: str q0, [x0, #48]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #24]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #48]
+; CHECK-NEXT: ret
+entry:
+ store i64 0, i64* %p
+ %p1 = getelementptr i64, i64* %p, i64 1
+ store i64 0, i64* %p1
+ %p3 = getelementptr i64, i64* %p, i64 3
+ store i64 0, i64* %p3
+ %p4 = getelementptr i64, i64* %p, i64 4
+ store i64 0, i64* %p4
+ %p6 = getelementptr i64, i64* %p, i64 6
+ store i64 0, i64* %p6
+ %p7 = getelementptr i64, i64* %p, i64 7
+ store i64 0, i64* %p7
+ ret void
+}
+
+; Verify that large stores generate stp q
+define void @merge_multiple_128bit_stores_consec(i64* %p) {
+; CHECK-LABEL: merge_multiple_128bit_stores_consec
+; CHECK: // %entry
+; NOSTRICTALIGN-NEXT: movi v[[REG:[0-9]]].2d, #0000000000000000
+; NOSTRICTALIGN-NEXT: stp q[[REG]], q[[REG]], [x{{[0-9]+}}]
+; NOSTRICTALIGN-NEXT: stp q[[REG]], q[[REG]], [x{{[0-9]+}}, #32]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #16]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #32]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #48]
+; CHECK-NEXT: ret
+entry:
+ store i64 0, i64* %p
+ %p1 = getelementptr i64, i64* %p, i64 1
+ store i64 0, i64* %p1
+ %p2 = getelementptr i64, i64* %p, i64 2
+ store i64 0, i64* %p2
+ %p3 = getelementptr i64, i64* %p, i64 3
+ store i64 0, i64* %p3
+ %p4 = getelementptr i64, i64* %p, i64 4
+ store i64 0, i64* %p4
+ %p5 = getelementptr i64, i64* %p, i64 5
+ store i64 0, i64* %p5
+ %p6 = getelementptr i64, i64* %p, i64 6
+ store i64 0, i64* %p6
+ %p7 = getelementptr i64, i64* %p, i64 7
+ store i64 0, i64* %p7
+ ret void
+}
+
+
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