[PATCH] D34472: [DAG] Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset

Nirav Dave via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 21 12:56:06 PDT 2017


niravd created this revision.
Herald added a subscriber: nemanjai.

As discussed in https://reviews.llvm.org/D34087, rewrite areNonVolatileConsecutiveLoads using
generic checks. Also, propagate missing local handling from there to
BaseIndexOffset checks.

Tests of note:

- test/CodeGen/X86/build-vector* - Now merging msising
- test/CodeGen/BPF/undef.ll - Improved store alignment allows an additional store merge
- test/CodeGen/PowerPC/complex-return.ll - improved aliasing allows forwarding. Change constant to prevent reduction to smaller float.
- test/CodeGen/X86/clear_upper_vector_element_bits.ll - DAG is improved, but scheduling causes a code size degradation. This is probably okay.


https://reviews.llvm.org/D34472

Files:
  include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
  test/CodeGen/BPF/undef.ll
  test/CodeGen/MSP430/Inst16mm.ll
  test/CodeGen/PowerPC/complex-return.ll
  test/CodeGen/X86/build-vector-128.ll
  test/CodeGen/X86/build-vector-256.ll
  test/CodeGen/X86/build-vector-512.ll
  test/CodeGen/X86/clear_upper_vector_element_bits.ll
  test/CodeGen/X86/wide-integer-cmp.ll
  test/CodeGen/X86/widen_arith-6.ll

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