[PATCH] D34336: [x86] transform vector inc/dec to use -1 constant (PR33483)

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 19 04:04:21 PDT 2017


RKSimon added a comment.

In https://reviews.llvm.org/D34336#783558, @craig.topper wrote:

> vpternlog does not have any idiom recognition.
>
> For pcmpeq I think intel only avoids the dependency but still executes it. What does AMD do?


Confirmed with Agner's docs - Jaguar/Bulldozer/Ryzen all avoid input register dependencies for PCMPEQ/PCMPGT/PSUB/XOR/ANDN simd instructions when the two inputs are the same. They still create+execute uops (unlike move elimination) - but as integer ops can often go down most simd pipes and are low latency they are very unlikely to cause a performance regression.

IMO we are much better off with this approach than the constant load, although the higher register pressure is a minor concern.



================
Comment at: lib/Target/X86/X86ISelLowering.cpp:34997
+  APInt SplatVal;
+  if (!ISD::isConstantSplatVector(N1, SplatVal) || SplatVal != 1)
+    return SDValue();
----------------
!SplatVal->isOneValue()


================
Comment at: test/CodeGen/X86/widen_cast-2.ll:11
-; CHECK-NEXT:    movdqa {{.*#+}} xmm0 = [1,1,1,1,1,1,1,1]
-; CHECK-NEXT:    movdqa {{.*#+}} xmm1 = <1,1,1,1,1,1,u,u>
 ; CHECK-NEXT:    cmpl $3, (%esp)
----------------
2 annoying (but low priority) things here - (1) these constants weren't merged and (2) different [] <> brackets for the comments...... 


https://reviews.llvm.org/D34336





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