[PATCH] D34337: [PPC] Fix two bugs in frame lowering.

[Tony Jiang via Phabricator via llvm-commits]

jtony created this revision.

1. The available program storage region of the red zone to compilers is 288 bytes rather than 244 bytes.
  1. The formula for negative number alignment calculation should be y = x & ~(n-1) rather than y = (x + (n-1)) & ~(n-1).


https://reviews.llvm.org/D34337

Files:
  lib/Target/PowerPC/PPCFrameLowering.cpp
  test/CodeGen/PowerPC/svr4-redzone.ll
  test/CodeGen/PowerPC/tailcall1-64.ll


Index: test/CodeGen/PowerPC/tailcall1-64.ll
===================================================================
--- test/CodeGen/PowerPC/tailcall1-64.ll
+++ test/CodeGen/PowerPC/tailcall1-64.ll
@@ -1,11 +1,14 @@
 ; RUN: llc -relocation-model=static -verify-machineinstrs < %s -march=ppc64 -tailcallopt | grep TC_RETURNd8
+; RUN: llc -relocation-model=static -verify-machineinstrs -march=ppc64 < %s | FileCheck %s
 define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
 entry:
 	ret i32 %a3
 }
 
 define fastcc i32 @tailcaller(i32 %in1, i32 %in2) {
 entry:
-	%tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 )		; <i32> [#uses=1]
+	%tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 )
 	ret i32 %tmp11
+; CHECK-NOT: stdu
+; CHECK: b tailcallee
 }
Index: test/CodeGen/PowerPC/svr4-redzone.ll
===================================================================
--- test/CodeGen/PowerPC/svr4-redzone.ll
+++ test/CodeGen/PowerPC/svr4-redzone.ll
@@ -29,11 +29,11 @@
 
 define i8* @bigstack() nounwind {
 entry:
- %0 = alloca i8, i32 230
+ %0 = alloca i8, i32 290
        ret i8* %0
 }
 ; PPC32-LABEL: bigstack:
-; PPC32: stwu 1, -240(1)
+; PPC32: stwu 1, -304(1)
 
 ; PPC64-LABEL: bigstack:
-; PPC64: stdu 1, -288(1)
+; PPC64: stdu 1, -352(1)
Index: lib/Target/PowerPC/PPCFrameLowering.cpp
===================================================================
--- lib/Target/PowerPC/PPCFrameLowering.cpp
+++ lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -435,7 +435,7 @@
 
   const PPCRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
 
-  // If we are a leaf function, and use up to 224 bytes of stack space,
+  // If we are a leaf function, and use up to 288 bytes of stack space,
   // don't have a frame pointer, calls, or dynamic alloca then we do not need
   // to adjust the stack pointer (we fit in the Red Zone).
   // The 32-bit SVR4 ABI has no Red Zone. However, it can still generate
@@ -446,7 +446,7 @@
       (Subtarget.isPPC64() ||                      // 32-bit SVR4, no stack-
        !Subtarget.isSVR4ABI() ||                   //   allocated locals.
         FrameSize == 0) &&
-      FrameSize <= 224 &&                          // Fits in red zone.
+      FrameSize <= 288 &&                          // Fits in red zone.
       !MFI.hasVarSizedObjects() &&                 // No dynamic alloca.
       !MFI.adjustsStack() &&                       // No calls.
       !MustSaveLR(MF, LR) &&
@@ -1869,8 +1869,12 @@
   }
 
   if (HasVRSaveArea) {
-    // Insert alignment padding, we need 16-byte alignment.
-    LowerBound = (LowerBound - 15) & ~(15);
+    // Insert alignment padding, we need 16-byte alignment. Note: for postive
+    // number the alignment formula is : y = x + (n-1) & ~(n-1). But since we
+    // are using negative number here (the stack is growning down). We should
+    // use formula : y = x & ~(n-1). Where x is the size before aligning, n is
+    // the alignment size ( n = 16 here) and y is the size after aligning.
+    LowerBound &= ~(15);
 
     for (unsigned i = 0, e = VRegs.size(); i != e; ++i) {
       int FI = VRegs[i].getFrameIdx();


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