[llvm] r305624 - [PPC] Remove isBarrier from CFENCE8's definition.
Tim Shen via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 16 18:25:34 PDT 2017
Author: timshen
Date: Fri Jun 16 20:25:34 2017
New Revision: 305624
URL: http://llvm.org/viewvc/llvm-project?rev=305624&view=rev
Log:
[PPC] Remove isBarrier from CFENCE8's definition.
Summary:
This is my misunderstanding on isBarrier. It's not for memory barriers,
but for other control flow purposes. lwsync doesn't have it either.
This fixes a simple crash with -verify-machineinstrs like below:
define void @Foo() {
entry:
%tmp = load atomic i64, i64* undef acquire, align 8
unreachable
}
I deliberately don't want to check in the test, since there is little
chance to regress on such a mistake. Such a test adds noise to the code
base.
I plan to check in first, since it fixes a crash, and the fix is obvious.
Reviewers: kbarton, echristo
Subscribers: sanjoy, nemanjai, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D34314
Modified:
llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=305624&r1=305623&r2=305624&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Fri Jun 16 20:25:34 2017
@@ -994,7 +994,7 @@ def LDgotTprelL: Pseudo<(outs g8rc:$rD),
(PPCldGotTprelL tglobaltlsaddr:$disp, i64:$reg))]>,
isPPC64;
-let isBarrier = 1, isPseudo = 1, Defs = [CR7], Itinerary = IIC_LdStSync in
+let isPseudo = 1, Defs = [CR7], Itinerary = IIC_LdStSync in
def CFENCE8 : Pseudo<(outs), (ins g8rc:$cr), "#CFENCE8", []>;
def : Pat<(PPCaddTls i64:$in, tglobaltlsaddr:$g),
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