[PATCH] D34220: [AArch64] Prefer B.cond to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free"

[Chad Rosier via Phabricator via llvm-commits]

mcrosier added a comment.

I went ahead and looked at each of the sub-target machine descriptions to determine if this patch is good, bad, or neutral.  In short, this transformation is either neutral or positive for all sub-targets.

The default WriteRes mappings are neutral when considering the non-flag-setting vs. flag-setting instructions.  Falkor and Kryo are the only targets that don't use the default WriteRes values, but converting from non-flag-setting to flag-setting is neutral.

These targets appear to be neutral: A53, A57, and Cyclone (per Matthias), ThunderX, ThunderX2T99.
These targets appear to benefit from this tranformation: Falkor, Kryo, M1

For M1, TBZ/TBNZ consume M1WriteC1 and M1WriteA2 for 2 cycles as compared to Bcc which consumes M1WriteB1 for 1 cycle.  That seems to be a clear win.  Both CBZ/CBNZ and Bcc execute in a single cycle, but consume different resources (M1WriteC1 vs. M1WriteB1, respectively).  This isn't clearly a win or loss, but overall this transform appears to be general goodness.


https://reviews.llvm.org/D34220