[PATCH] D34239: [mips][microMIPS] Extending size reduction pass with XOR16

[Simon Dardis via Phabricator via llvm-commits]

sdardis accepted this revision.
sdardis added a comment.
This revision is now accepted and ready to land.

LGTM with inline comments addressed.



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Comment at: lib/Target/Mips/MicroMipsSizeReduction.cpp:460-475
     if (OpTransfer == OT_Operand2)
       MIB.add(MI->getOperand(2));
     else if (OpTransfer == OT_Operands02) {
       MIB.add(MI->getOperand(0));
       MIB.add(MI->getOperand(2));
+    } else if (OpTransfer == OT_OperandsXOR) {
+      if (MI->getOperand(0).getReg() == MI->getOperand(2).getReg()) {
----------------
Change this if..else chain to switch on OpTransfer, with a default case of llvm_unreachable.


================
Comment at: lib/Target/Mips/MicroMipsSizeReduction.cpp:496
+  if (!Subtarget->inMicroMipsMode() || !Subtarget->hasMips32r2()
+      || Subtarget->hasMips32r6() || Subtarget->hasMips64r6())
     return false;
----------------
There's a small 'gotcha' here, if Subtarget->hasMips64r6() is true, Subtarget->hasMips32r6() is also true. So "|| Subtarget->hasMips64r6()" can be removed.

hasMips64(rX)() implies hasMips32(rX)() is also true, due to the way the architecture is defined, so generally you only need to check for the availability of the 32bit revision of the ISA to determine what revision is being targeted.


https://reviews.llvm.org/D34239