[llvm] r305390 - Revert "[ARM] Support constant pools in data when generating execute-only code."
Alexandros Lamprineas via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 14 08:00:08 PDT 2017
Author: alelab01
Date: Wed Jun 14 10:00:08 2017
New Revision: 305390
URL: http://llvm.org/viewvc/llvm-project?rev=305390&view=rev
Log:
Revert "[ARM] Support constant pools in data when generating execute-only code."
This reverts commit 3a204faa093c681a1e96c5e0622f50649b761ee0.
I've upset a buildbot which runs the address sanitizer:
ERROR: AddressSanitizer: stack-use-after-scope
lib/Target/ARM/ARMISelLowering.cpp:2690
That Twine variable is used illegally.
Modified:
llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/lib/Target/ARM/ARMISelLowering.h
llvm/trunk/test/CodeGen/ARM/constantfp.ll
Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=305390&r1=305389&r2=305390&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Wed Jun 14 10:00:08 2017
@@ -1504,9 +1504,6 @@ void ARMAsmPrinter::EmitInstruction(cons
return;
}
case ARM::CONSTPOOL_ENTRY: {
- if (Subtarget->genExecuteOnly())
- llvm_unreachable("execute-only should not generate constant pools");
-
/// CONSTPOOL_ENTRY - This instruction represents a floating constant pool
/// in the function. The first operand is the ID# for this instruction, the
/// second is the index into the MachineConstantPool that this is, the third
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=305390&r1=305389&r2=305390&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Jun 14 10:00:08 2017
@@ -2669,34 +2669,12 @@ static SDValue LowerWRITE_REGISTER(SDVal
// Select(N) returns N. So the raw TargetGlobalAddress nodes, etc. can only
// be used to form addressing mode. These wrapped nodes will be selected
// into MOVi.
-SDValue ARMTargetLowering::LowerConstantPool(SDValue Op,
- SelectionDAG &DAG) const {
+static SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) {
EVT PtrVT = Op.getValueType();
// FIXME there is no actual debug info here
SDLoc dl(Op);
ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
SDValue Res;
-
- // When generating execute-only code Constant Pools must be promoted to the
- // global data section. It's a bit ugly that we can't share them across basic
- // blocks, but this way we guarantee that execute-only behaves correct with
- // position-independent addressing modes.
- if (Subtarget->genExecuteOnly()) {
- auto AFI = DAG.getMachineFunction().getInfo<ARMFunctionInfo>();
- auto T = const_cast<Type*>(CP->getType());
- auto C = const_cast<Constant*>(CP->getConstVal());
- auto M = const_cast<Module*>(DAG.getMachineFunction().
- getFunction()->getParent());
- auto L = Twine(DAG.getDataLayout().getPrivateGlobalPrefix()) + "CP" +
- Twine(DAG.getMachineFunction().getFunctionNumber()) + "_" +
- Twine(AFI->createPICLabelUId());
- auto GV = new GlobalVariable(*M, T, /*isConstant=*/true,
- GlobalVariable::InternalLinkage, C, L);
- SDValue GA = DAG.getTargetGlobalAddress(dyn_cast<GlobalValue>(GV),
- dl, PtrVT);
- return LowerGlobalAddress(GA, DAG);
- }
-
if (CP->isMachineConstantPoolEntry())
Res = DAG.getTargetConstantPool(CP->getMachineCPVal(), PtrVT,
CP->getAlignment());
@@ -3140,19 +3118,6 @@ static bool isReadOnly(const GlobalValue
isa<Function>(GV);
}
-SDValue ARMTargetLowering::LowerGlobalAddress(SDValue Op,
- SelectionDAG &DAG) const {
- switch (Subtarget->getTargetTriple().getObjectFormat()) {
- default: llvm_unreachable("unknown object format");
- case Triple::COFF:
- return LowerGlobalAddressWindows(Op, DAG);
- case Triple::ELF:
- return LowerGlobalAddressELF(Op, DAG);
- case Triple::MachO:
- return LowerGlobalAddressDarwin(Op, DAG);
- }
-}
-
SDValue ARMTargetLowering::LowerGlobalAddressELF(SDValue Op,
SelectionDAG &DAG) const {
EVT PtrVT = getPointerTy(DAG.getDataLayout());
@@ -7669,9 +7634,21 @@ SDValue ARMTargetLowering::LowerOperatio
switch (Op.getOpcode()) {
default: llvm_unreachable("Don't know how to custom lower this!");
case ISD::WRITE_REGISTER: return LowerWRITE_REGISTER(Op, DAG);
- case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
+ case ISD::ConstantPool:
+ if (Subtarget->genExecuteOnly())
+ llvm_unreachable("execute-only should not generate constant pools");
+ return LowerConstantPool(Op, DAG);
case ISD::BlockAddress: return LowerBlockAddress(Op, DAG);
- case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
+ case ISD::GlobalAddress:
+ switch (Subtarget->getTargetTriple().getObjectFormat()) {
+ default: llvm_unreachable("unknown object format");
+ case Triple::COFF:
+ return LowerGlobalAddressWindows(Op, DAG);
+ case Triple::ELF:
+ return LowerGlobalAddressELF(Op, DAG);
+ case Triple::MachO:
+ return LowerGlobalAddressDarwin(Op, DAG);
+ }
case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
case ISD::SELECT: return LowerSELECT(Op, DAG);
case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=305390&r1=305389&r2=305390&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Wed Jun 14 10:00:08 2017
@@ -601,8 +601,6 @@ class InstrItineraryData;
SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG,
const ARMSubtarget *Subtarget) const;
SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
- SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
- SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerGlobalAddressWindows(SDValue Op, SelectionDAG &DAG) const;
Modified: llvm/trunk/test/CodeGen/ARM/constantfp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/constantfp.ll?rev=305390&r1=305389&r2=305390&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/constantfp.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/constantfp.ll Wed Jun 14 10:00:08 2017
@@ -11,9 +11,6 @@
; RUN: llc -mtriple=thumbv7meb -arm-execute-only -mcpu=cortex-m4 %s -o - \
; RUN: | FileCheck --check-prefix=CHECK-XO-FLOAT --check-prefix=CHECK-XO-DOUBLE-BE %s
-; RUN: llc -mtriple=thumbv7m -arm-execute-only -mcpu=cortex-m4 -relocation-model=ropi %s -o - \
-; RUN: | FileCheck --check-prefix=CHECK-XO-ROPI %s
-
; RUN: llc -mtriple=thumbv8m.main -mattr=fp-armv8 %s -o - \
; RUN: | FileCheck --check-prefix=CHECK-NO-XO %s
@@ -23,8 +20,6 @@
; RUN: llc -mtriple=thumbv8m.maineb -arm-execute-only -mattr=fp-armv8 %s -o - \
; RUN: | FileCheck --check-prefix=CHECK-XO-FLOAT --check-prefix=CHECK-XO-DOUBLE-BE %s
-; RUN: llc -mtriple=thumbv8m.main -arm-execute-only -mattr=fp-armv8 -relocation-model=ropi %s -o - \
-; RUN: | FileCheck --check-prefix=CHECK-XO-ROPI %s
define arm_aapcs_vfpcc float @test_vmov_f32() {
; CHECK-LABEL: test_vmov_f32:
@@ -181,48 +176,3 @@ define arm_aapcs_vfpcc double @lower_con
; CHECK-XO-DOUBLE-BE-NOT: vldr
ret double 3.140000e-01
}
-
-; This is a target independent optimization, performed by the
-; DAG Combiner, which promotes floating point literals into
-; constant pools:
-;
-; (a cond b) ? 1.0f : 2.0f -> load (ConstPoolAddr + ((a cond b) ? 0 : 4)
-;
-; We need to make sure that the constant pools are placed in
-; the data section when generating execute-only code:
-
-define arm_aapcs_vfpcc float @lower_fpconst_select(float %f) {
-
-; CHECK-NO-XO-LABEL: lower_fpconst_select
-; CHECK-NO-XO: adr [[REG:r[0-9]+]], [[LABEL:.?LCPI[0-9]+_[0-9]+]]
-; CHECK-NO-XO: vldr {{s[0-9]+}}, {{[[]}}[[REG]]{{[]]}}
-; CHECK-NO-XO-NOT: .rodata
-; CHECK-NO-XO: [[LABEL]]:
-; CHECK-NO-XO: .long 1335165689
-; CHECK-NO-XO: .long 1307470632
-
-; CHECK-XO-FLOAT-LABEL: lower_fpconst_select
-; CHECK-XO-FLOAT: movw [[REG:r[0-9]+]], :lower16:[[LABEL:.?LCP[0-9]+_[0-9]+]]
-; CHECK-XO-FLOAT: movt [[REG]], :upper16:[[LABEL]]
-; CHECK-XO-FLOAT: vldr {{s[0-9]+}}, {{[[]}}[[REG]]{{[]]}}
-; CHECK-XO-FLOAT: .rodata
-; CHECK-XO-FLOAT-NOT: .text
-; CHECK-XO-FLOAT: [[LABEL]]:
-; CHECK-XO-FLOAT: .long 1335165689
-; CHECK-XO-FLOAT: .long 1307470632
-
-; CHECK-XO-ROPI-LABEL: lower_fpconst_select
-; CHECK-XO-ROPI: movw [[REG:r[0-9]+]], :lower16:([[LABEL1:.?LCP[0-9]+_[0-9]+]]-([[LABEL2:.?LPC[0-9]+_[0-9]+]]+4))
-; CHECK-XO-ROPI: movt [[REG]], :upper16:([[LABEL1]]-([[LABEL2]]+4))
-; CHECK-XO-ROPI: [[LABEL2]]:
-; CHECK-XO-ROPI: vldr {{s[0-9]+}}, {{[[]}}[[REG]]{{[]]}}
-; CHECK-XO-ROPI: .rodata
-; CHECK-XO-ROPI-NOT: .text
-; CHECK-XO-ROPI: [[LABEL1]]:
-; CHECK-XO-ROPI: .long 1335165689
-; CHECK-XO-ROPI: .long 1307470632
-
- %cmp = fcmp nnan oeq float %f, 0.000000e+00
- %sel = select i1 %cmp, float 5.000000e+08, float 5.000000e+09
- ret float %sel
-}
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